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How to analyze the Application of FPGA in Digital Power Controller

2025-03-29 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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In this issue, the editor will bring you the idea of how to analyze the application of FPGA in the digital power controller. The article is rich in content and analyzes and narrates it from a professional point of view. I hope you can get something after reading this article.

1 introduction

Today, with the rapid development of information technology, the digitization of electronic system has become an obvious trend for all to see. From the traditional application of small and medium-sized chips to the extensive use of single-chip microcomputer, to the application of DSP and FPGA in system design, electronic design technology has entered a new stage.

FPGA not only has the characteristics of large capacity and strong logic function, but also has high speed and high reliability. With the development of EDA technology and VLSI technology, especially the rapid development of software / hardware IP core industry, system-on-a-Chip (SOPC) has been widely used.

Through the research and development of high-precision digital power supply system, the application idea of FPGA in digital power controller is put forward.

2 system composition

This system is a high precision switching power supply with full digital control based on single chip field programmable gate array (FPGA). The power supply system of digitally controlled H-bridge pulse width modulated DC-DC converter is shown in figure 1.

In the figure, the main power circuit is composed of three-phase rectifier, low frequency LC filter circuit, DC-DC power converter and output high frequency filter circuit. The control and regulation functions are mainly completed by the digital power controller based on FPGA, which can adjust the output voltage and current of the power supply according to the design requirements.

The FPGA is mainly divided into two modules, the first module is a communication management module composed of soft core CPU, and the second module is composed of several DSP blocks, which mainly completes the PI or PID operation of the regulator, high-resolution PWM signal generation and digital filtering.

In PWM switching power supply, the generation of PWM waveform and its accurate modulation are very important. When the FPGA digital controller is used, the current loop and voltage loop are regulated by digital PI (proportional integral) or PID (proportional integral differential) regulation. The feedback current or voltage signal is converted by Amax D (analog / digital) and input to the controller, and the width of the pulse is adjusted by the controller.

Compared with the traditional analog control mode, the digital power supply with the above scheme has obvious advantages. For different load objects, the regulator parameters can be modified in the software to meet the index requirements, and can be freely configured into a single-loop or double-loop control system according to the actual needs. All these are done in the software, and the hardware of the system control adjustment unit does not need to be configured repeatedly.

3 soft core Nios CPU

Using SOPC Builder development tools in QuartusII development software, we can quickly construct a Nios soft core CPU and embed it into the FPGA device. The Nios soft core CPU is shown in figure 2.

In this example, the communication functions of UART-RS232 and Ethernet, the LCD display function of LCD, the functions of digital quantity and switch value IMaple O and external data storage management are constructed, and the Nios soft core CPU is programmed by Nios II IDE, the integrated development environment of Nios II, and the high-level language Nios II IDE +.

It can complete the communication between FPGA and host computer RS232 port or Ethernet network, local information collection and display, data storage management and so on. The coordination of other DSP blocks or IP cores is managed within the FPGA through an address bus and a data bus.

4 regulator algorithm (PI or PID)

In figure 3, after the upper current given signal is converted by 16-bit DAC, the error signal is obtained by comparing with the current feedback signal output from DCCT. The error is amplified by the error amplifier and sent to the PI regulator. The output of the regulator controls the PWM and drives the power device, so as to achieve the high-precision output current required by the load object.

Given the ramp of the system shown in figure 3 in Matlab/Simulink, the system response can be simulated as shown in figure 4. It can be seen that the system has no overshoot, and the tracking error is less than 0.02A (0.02 × 10 ~ (- 4)), which meets the requirements of the system.

The generation of PWM is mainly composed of pulse width register, buffer register, cycle register, dead zone register, dead zone generator, numerical comparator, control logic and so on.

The pulse width register determines the pulse width of each PWM signal; the buffer register buffers the pulse width data; the period register determines the chopping period of the PWM; and the dead zone register determines the dead time of the H bridge arm.

The pulse width register is updated once in each switching cycle, and its output data is buffered and compared with the reference counter to get each PWM signal. After the dead-time circuit processing, four PWM driving signals are generated to drive the corresponding power devices.

The reference counter, which is used to generate a triangle wave reference similar to that in an analog circuit, is a reversible counter with a minimum calculated value of 0 and a maximum calculated value of alternating between the values stored in the periodic register and the counting direction.

The reference counting unit generates a synchronization signal SYN at the maximum count value. When it is valid, the data of four pulse widths are stored in their respective buffer registers to achieve double buffering, so that each pulse width register can be updated sequentially when the SYN is invalid without affecting the final power device turn-on.

The above is the editor for you to share how to analyze the application of FPGA in the digital power controller, if you happen to have similar doubts, you might as well refer to the above analysis to understand. If you want to know more about it, you are welcome to follow the industry information channel.

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