How to solve the Linux makefile problem
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Write the relationship of each module into makefile, and specify the compilation command, so that when the source code of the module is modified, you can recompile all the modules involved in the module modification by running the makefile file using the make command, and do not worry about other modules.
Makefile file is written as follows:
Target, component
Rules
For example, there are the following five files:
/ * main.c * /
# include "mytool1.h"
# include "mytool2.h"
Int main (int argc,char * * argv)
{
Mytool1_print ("hello")
Mytool2_print ("hello")
}
/ * mytool1.h * /
# ifndef _ MYTOOL_1_H
# define _ MYTOOL_1_H
Void mytool1_print (char * print_str)
# endif
/ * mytool1.c * /
# include "mytool1.h"
Void mytool1_print (char * print_str)
{
Printf ("This is mytool1 print% s\ n", print_str)
}
/ * mytool2.h * /
# ifndef _ MYTOOL_2_H
# define _ MYTOOL_2_H
Void mytool2_print (char * print_str)
# endif
/ * mytool2.c * /
# include "mytool2.h"
Void mytool2_print (char * print_str)
{
Printf ("This is mytool2 print% s\ n", print_str)
}
You can compile in this way to run the executable main
Gcc-c main.c (generate main.o)
Gcc-c mytool1.c (generate mytool1.0)
Gcc-c mytool2.c (generate mytool2.0)
Gcc-o main main.o mytool1.o mytool2.o (generate main)
You can also write makefile files this way.
Main main.o mytool.o mytool2.o
Gcc-0 $@ $^
Main.0 main.c mytool1.h mytool2.h
Gcc-c $<
Mytool1.0 mytool1.c mytool1.h
Gcc-c $