Case Analysis of codesnippet sequence Detection and sequence Generation

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Sequence detection and sequence generation are a pair of symmetrical designs, just as there are differentials and integrals.

Sequence detection is divided into overlapping detection and non-overlapping detection.

For example, for the detection sequence 1101011, we give the input: 110101101011. If there is no overlap detection, only one sequence can be detected: 110101101011.

If there is overlap detection, two such sequences can be detected: 110101101011.

Similarly, sequence generation can be divided into overlapping sequence generation method and non-overlapping sequence generation method, and the sequence generation method can also be generated by shift register or state machine; both methods are mentioned later.

Shift register implementation

Taking the generating sequence 1101011 as an example, we produce a sequence like this 11010111101011.

So we need to use a 7-bit shift register, which shifts the sequence 1101011 to the left each time and outputs the highest bit at the same time; the 7-bit shift register consumes seven triggers, which is also a test point.

The design is also extremely simple, as follows:

Module seq_gen7 (input clk, input reset, output out); reg [6:0] seq_mid; always@ (posedge clk or posedge reset) begin if (reset) seq_mid