Shulou(Shulou.com)06/02 Report--

SRAM is widely used in various digital devices because of its high-speed and static advantages, and it is often used as a buffer between different components, especially in the computer architecture, that is, the cache embedded in the CPU (Cache). The processing speed of the computer is growing at a high speed. In order to provide sufficient data cache capacity, with the development of integrated circuit manufacturing technology, the memory cell area of embedded SRAM is also decreasing at a speed of about 0.5 times per generation. The density of embedded SRAM at 45 nm process nodes has reached 150 Mb/cm2. Dual-port SRAM (Dual-Port SRAM, DP-SRAM) occupies an important place in the field of SRAM by virtue of its ability to read and write at the same time, especially in multi-core, real-time signal processing systems.

Due to the limitation of power consumption, system-on-chip (System on Chip, SoC) can not improve the performance by increasing the system frequency indefinitely, but uses parallel computing to obtain higher system computing power, so multi-core and even multi-core processors have been rapidly developed and widely used. But at the same time, it also means that the access times of memory increase greatly, and the performance of memory will become the bottleneck of the system, which encounters the so-called memory wall (Memory Wall). Therefore, the demand for dual-port or even multi-port memory which can read and write to more than two ports is increasing. At the same time, with the popularization and development of mobile consumer electronic products such as smart phones and tablet computers, people have higher and higher requirements for related products, which put forward higher and higher requirements for the real-time performance and throughput of the system.

Compared with single-port SRAM (Single-Port SRAM, SP-SRAM), dual-port SRAM has two sets of independent read-write ports, so it has higher bandwidth, especially suitable for the above systems: dual-port SRAM can provide a simple, reliable and efficient communication method for multi-core systems, and can also provide higher parallelism for signal processing systems. A SoC system for video compression has three cores. In order to synchronize and exchange data between processors without adding burden to the AMBA system bus, three 2-kB dual-port SRAM are used to connect the three cores together to improve the overall performance of the system.

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