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Introduction to X86 and ARM architecture

2025-04-12 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Servers >

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X86 Overview

X86 is a messy instruction set introduced by Intel, which is used to control the operation of the chip. Now X86 has been widely used in the field of household PC (chassis + xx motherboard + xx power supply + xx processor + (optional optical drive).

The x86 architecture first appeared in the Intel 8086 CPU introduced in 1978. It was developed from the Intel 8008 processor, while the 8008 architecture was developed from the Intel 4004. 8086 was chosen by IBM PC three years later, and since then x86 has become the standard platform for personal computers and the most successful CPU architecture.

X86 architecture is an important variable instruction length CISC (messy instruction set computer, Complex InstrucTIon Set Computer). Memory visits with word groups (word, 4 bytes) allow misalignment of memory addresses, and word groups are stored in memory in the order in which low-order bytes come first. Forward compatibility has always been a driving force on the back of the development of x86 architecture (the need for design determines this element and often leads to criticism, especially from supporters and theorists of rival processors. They are puzzled by the continued success of an architecture that is widely considered to be backward in design. But in newer microarchitectures, x86 processors convert x86 instructions into microinstructions that are more like RISC and then execute them, thus achieving superscalar functions comparable to RISC, while still maintaining forward compatibility. The processor of x86 architecture has four execution forms, namely, real form, maintenance form, system management form and virtual V86 form.

ARM architecture

The following figure shows the ARM architecture diagram. It consists of 32-bit ALU, several 32-bit general registers and status registers, 32T Impulse 8-bit multiplier, 32T Impulse 32-bit bucket shift register, instruction decoding and control logic, instruction pipeline and data / address register.

1.ALU: it consists of two Operand latches, adders, logic functions, results, and zero detection logic.

two。 Barrel shift register: ARM chooses 32T Impulse 32-bit barrel shift register, so that the left / right shift n-bit, ring shift n-bit and arithmetic right shift n-bit can be completed at one time.

3. High-speed multiplier: the multiplier generally chooses the method of "adding one shift" to complete the multiplication. In order to improve the operation speed, ARM chooses the method of two-bit multiplication to complete the "add one shift" operation according to the two bits of the multiplier, and the ARM high-speed multiplier chooses the structure of 32T Impulse, so that the integration can be reduced (the corresponding chip area is less than 1can3 of the parallel multiplier).

4. Floating-point components: floating-point components are used as an option for ARM frameworks. The FPA10 floating-point accelerator is connected to the ARM as a co-processing mode and is executed by interpretation of the co-processing instructions.

5. Controller: the controller of ARM uses hard-wired programmable logic array PLA.

6. Register

The other six forms of processors other than the user form are called privileged forms (PrivilegedModes). In these forms, the program can visit all the system resources, but also can switch the processor form arbitrarily. In the meantime, in addition to the system form, the other five forms of privilege are also called abnormal forms.

The processor form can be switched by software control, or by external abort or abnormal processing. Most of the user programs run in the user form, at this time, the application can not visit some system resources maintained by the operating system, and the application can not switch the processor form directly. When it is necessary to switch the form of the processor, the application can occur abnormal processing and switch the form during the abnormal processing. This architecture enables the operating system to control the resources of the entire system.

When the application is abnormally aborted, the processor enters the corresponding abnormal form. In each abnormal form, there is a set of registers for the corresponding exception handler to use, so as to ensure that when entering the abnormal form, the registers in the user form (which ensures the operation of the program) are not damaged.

The system form is not entered through an abnormal process, it has exactly the same register as the user form. However, the system form belongs to the privileged form, which can not only visit all the system resources, but also switch the processor form directly. It is primarily used for the mission of the operating system. Usually, the mission of the operating system needs to visit all the system resources, and the mission still uses the register group in the form of the user, rather than the corresponding register group in the abnormal form. This ensures that the mission condition is not damaged when abnormal abortions occur.

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