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4. Variables and assignments 4.1. Variable

Makefile supports the probability of variables in programming languages, but there is no variable type and only represents text data.

Variable naming rules: variables can contain characters, numbers, underscores, orders cannot contain ":", "#", "=", variable names are case-sensitive.

Definition and use of variables:

4.2. Assignment

There are 4 variable assignment methods in Makefile:

4.2.1. Simple assignment (: =)

The general assignment method in programming language is only valid for the current statement, which is equivalent to the assignment in C language. It is recommended to use simple assignment when there are no special requirements.

X: = fooy: = $(x) bx: = newtest: @ echo "x = > $(x)" @ echo "y = > $(y)"

Output result:

4.2.2. Recursive assignment (=)

The assignment operation may affect multiple other variables, and all other variables related to the target variable will be affected.

X = fooy = $(x) bx = newtest: @ echo "x = > $(x)" @ echo "y = > $(y)"

Output result:

Note: do not use recursive assignment as much as possible if it is not necessary. The assignment number here is not equivalent to the assignment number in C language.

4.2.3. Conditional assignment (? =)

If the variable is not defined, the value in the assignment symbol is used to define the variable, and if it is already defined, the assignment is invalid.

X: = fooy: = $(x) bx? = newtest: @ echo "x = > $(x)" @ echo "y = > $(y)"

Output result:

4.2.4. Append assignment (+ =)

The original variable value is followed by a new value, and the original variable and the new value are separated by a space.

X: = fooy: = $(x) bx + = newtest: @ echo "x = > $(x)" @ echo "y = > $(y)"

Output result:

5. Use of predefined variables

There are some predefined variables in Makefile, which are mainly divided into two categories: automatic variables and special variables.

5.1. Automatic variable

$@ the target in the current rule that triggers the execution of the command

All dependencies in the current rule

$

$@ "@ echo" $^ = > $^ "@ echo" $$

$$(obj1) "

Output result:

6.1.2. Mode replacement

The mode substitution of the variable, using% to retain the specified characters in the value of the variable, replacing other characters

Syntax format: $(var:a%b=x%y) or ${src1:a%b=x%y}

Src2: = a11b.c a22b.c a33b.cobj2: = $(src2:a%b.c=x%y) test2: @ echo "obj2 = > $(obj2)"

Output result:

6.1.3. Pattern substitution in rules

Meaning:

Match sub-goals from targets through target-patten, generate dependencies from sub-targets through prereq-patten, and then form the completed rules.

Src1: = a.cc b.cc c.ccobj1: = $(src1:cc=o) test1: @ echo "obj1 = > $(obj1)" src2: = a11b.c a22b.c a33b.cobj2: = $(src2:a%b.c=x%y) test2: @ echo "obj2 = > $(obj2)"

Output result:

6.2. Nested references to variables

A variable name can contain references to other variables, essentially using one variable to represent another variable.

6.3. Command line variable

When you run make, you can define variables on the command line, which by default override the variables defined in Makefile.

6.4.override keyword

Used to indicate that variables defined in Makefile cannot be overridden, and the definition and assignment of variables require the use of the override keyword

6.5.define keyword

Used to define multiline variables in Makefile. Multiline variables are defined from the variable name to the end of endef. You can use the override keyword to prevent variables from being overridden. Variables defined by define are equivalent to variables defined using =.

Hm: = hello makefileoverride var: = override-testdefine fooI'm foolendedfoverride define cmd @ echo "run cmd ls." @ lsendeftest: @ echo "hm = > $(hm)" @ echo "var = > $(var)" @ echo "foo = > $(foo)" ${cmd}

The result of running makefile directly:

The result of passing parameters on the command line:

Make makefile foo= "i am cmd foomake-f makefile.3" var= "cmd line var"

Obviously we changed the value of the foo variable because the foo variable is not modified by override, but we cannot change the value of the var variable.

7. The advanced topic of the variable-7.1. Environment variable

The value of the environment variable can be used in Makefile. If the ordinary variable defined has the same name as the environment variable, the environment variable will be overwritten. Specify the-e option when running make, and use the environment variable first.

Advantage: environment variables can be used in all files

Disadvantages: too many environment variables can lead to reduced portability

How variables are passed between different Makefile:

1. Directly define environment variables externally for transmission

two。 Use export to define variables for passing (define temporary environment variables)

3. Pass using make command line variables (recommended)

PATH: = pathexport var: = D.T.Softwarenew: = TDelphitest: @ echo "PATH = > $(PATH)" @ echo "make another file..." @ $(MAKE)-f makefile.2 @ $(MAKE)-f makefile.2 new:=$ (new)

The content of makefile.2:

Test: @ echo "PATH = > $(PATH)" # 1. Define environment variables directly outside to pass @ echo "var = > $(var)" # 2. Use export to define variables to pass (define temporary environment variables) @ echo "new = > $(new)" # 3. Pass using make command line variables (recommended)

Output result:

7.2. Target variable (local variable)

The scope is only in the specified target and associated rules.

Target: name value

Target: voerride name value

7.3. Mode variable (local variable)

The schema variable is an extension of the target variable, and the scope is only in the consistent target and joint rules.

Pattrn: name value

Pattrn: voerride name value

Var: = D.T.Softwarenew: = TDelphitest: var: = test-var # Target variable% e: override new: = test-new # Mode variable test: another @ echo "test:" @ echo "var = > $(var)" @ echo "new = > $(new)" another: @ echo "another:" @ echo "var = > $(var)" @ echo "new = > $(new)" rule: @ Echo "rule:" @ echo "var = > $(var)" @ echo "new = > $(new)"

Run the result directly:

Results of make rule operation:

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