Shulou(Shulou.com)11/24 Report--

On October 19, 2023, Sierxin (S2C) announced that Beijing Open Source Chip Research Institute (hereinafter referred to as "Kaixinyuan") had adopted Sierxin's core pupil RISC-V prototype verification system in its successive "Xiangshan" VU19P processor development, which not only accelerated the product iteration, but also helped many enterprises to develop a variety of high-end chips based on "Xiangshan".

RISC-V, as an open instruction set architecture, has gradually become the focus of global processor development. Among them, Xiangshan is regarded as the leading international representative of RISC-V and is an open source high-performance RISC-V processor core. Since the release of Yanqi Lake in 2019, GitHub, the world's largest open source project hosting platform, has obtained more than 4000 Star and 551 branches (Fork), making it one of the most concerned open source hardware projects in the world. So far, Xiangshan has successfully launched two generations of products, and the third generation of Kunming Lake is under research and development. Among them, the second generation "Nanhu" adopts 14nm process technology, its core frequency is as high as 2 GHz, and gets a SPECCPU 2006 score of 10 / GHz, and its comprehensive performance also surpasses that of ARM's Cortex-A76. There are already 18 industry leaders are conducting joint research and development based on "Xiangshan" core to promote the demonstration application of high-end chips, so as to accelerate the construction and development of RISC-V ecology.

In order to promote the "Xiangshan" project, Sierxin provided the core pupil VU19P prototype verification system, a platform that can test the function and performance of software on real hardware, so that the software and hardware engineers of "Xiangshan" can work in parallel and significantly accelerate the process. This system has both flexibility and expansibility, and meets a variety of design and application requirements. Kaixinyuan added: "because of the diversity of RISC-V, customers have to evaluate different RISC-V cores when choosing." Sielcore's system enables us to demonstrate processor performance effectively, successfully completing SPEC running scores, IO verification and BSP driver development, covering the whole life cycle from hardware design to software integration. It is convenient for our customers to choose the most suitable solution and promote the follow-up joint research and development based on 'Xiangshan' core. "

The picture shows Xiangshan (Nanhu architecture) demonstrated on the core pupil VU19P prototype verification system.

1. SPEC running score verification:

In hardware design, once you have a prototype or earlier version of the design, you can use the SPEC benchmark to run points to verify that the expected performance has been achieved. Based on Sierxin's core pupil, the Xiangshan team ran the SPEC benchmark test, running Linux and graphical interface in conjunction with the graphics card to visually evaluate its performance. This provides the team with valuable feedback that can be optimized to meet or exceed expected performance standards. At present, the SPEC2006 score of the second generation "Xiangshan" (South Lake architecture) is 20, surpassing the ARM Cortex-A76 in 2018.

2. IO verification:

IO (input / output) verification is a process to ensure that the communication between the chip and the external environment (such as other chips, systems, etc.) is correct and efficient. Sierxin's core pupil provides Xiangshan with a practical environment for testing and verifying all input / output communication channels. This ensures perfect integration and communication between Xiangshan and other hardware components, such as memory, storage and other interfaces. In the construction of the whole verification system, the "Xiangshan" team uses Sierxin's PPM, GMAC, PCIe and other daughter cards and interfaces. The overall running speed of the system is 50MHz, and each interface is docked with the "Xiangshan" system according to their respective standard frequencies.

3. BSP driver development:

BSP (Board Support Package) driver development is the key bridge to ensure smooth interaction between software and hardware. Using prototype verification technology, developers can directly develop and test BSP on real hardware to ensure the close coordination of software and hardware, thus improving the efficiency and accuracy of development. As the hardware design of the "Xiangshan" processor was steadily implemented on the Sielcore prototype verification system, its software team immediately launched the BSP driver development. This not only enables the software and hardware team to achieve parallel development, but also ensures that the software is optimized in the real hardware environment. This early intervention strategy gives the software team a deeper understanding of hardware features and limitations, laying the foundation for Xiangshan to ensure hardware design and accelerate software development before the final production.

Xiangshan is undoubtedly the world's leading high-performance RISC-V processor core. In order to maintain this position, it is vital to choose the right partner. "Sierxin's prototype verification system has undoubtedly laid a solid foundation for the success of our Xiangshan project," Kaixin said. Sierxin was chosen because we fully recognize their excellent technology and services: the technology is stable and lasting, the service response is fast, and the products have been verified for a long time, stable and mature. This has injected a huge impetus into our project. "

Mr. Chen Yingren, vice president of Silxin, also said: "We are very pleased to see that Xiangshan has successfully applied our 'Core contact lenses' to accelerate the iteration of products and meet a wide range of target market needs. In the future, we will continue to work closely with Kaixinyuan to expand the RISC-V community and make unremitting efforts to promote the prosperity and prospect of RISC-V ecology."

About Beijing Open Source Chip Research Institute

In recent years, with the rapid development of RISC-V, it has become the focus of international scientific and technological competition. In order to improve the level of integrated circuit design in China and build a technology platform docking with the international open source community, Beijing and the Chinese Academy of Sciences attach great importance to the development of RISC-V and organize a number of industry leading enterprises and top scientific research institutions to establish Beijing Open Source Chip Research Institute on December 6, 2021. The Institute uses open source and opening up to consolidate industrial development consensus, stimulates application traction potential with collaborative innovation, strives to accelerate the integration of RISC-V innovation chain and industrial chain, accelerates the industrialization of scientific and technological innovation achievements, and speeds up the creation of a global leading RISC-V industrial ecology.

About Sierxin S2C

Sierxin (S2C) has been focused on the field of integrated circuit EDA since it established its headquarters in Shanghai in 2004. As a well-known EDA solution expert in the industry, the company's business covers architecture design, software simulation, hardware simulation, prototype verification, EDA cloud and other tools and services. It has established good cooperative relations with more than 600 domestic and foreign enterprises, serving the realization of digital circuit design functions such as artificial intelligence, high-performance computing, image processing, data storage, signal processing, etc., and is widely used in terminal fields such as Internet of things, cloud computing, 5G communications, intelligence, automotive electronics and so on.

Headquartered in Shanghai, the company has established a global technology R & D and market service network with branches or offices in Beijing, Shenzhen, Xi'an, Hong Kong, Tokyo, Seoul and San Jose.

Sierxin's technical strength in the field of EDA has been widely recognized by the industry. Through years of hard work, it has built a dual dominant position of technology and market in the field of digital front-end EDA. And participated in the formulation of China's EDA group standards, undertaken a number of national and local major scientific research projects, and was awarded as a national special new "Little Giant" enterprise.

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