Shulou(Shulou.com)11/24 Report--

Thanks to CTOnews.com netizen Xiao Zhan cut cut, Alejandro86 clue delivery! CTOnews.com October 20 news, according to the Chinese Academy of Sciences Shanghai Institute of Microsystems news, Shanghai Institute of Microsystems Wei Xing researcher team recently announced that in 300 mm SOI wafer manufacturing technology has made breakthrough progress, prepared the first piece of 300 mm radio frequency (RF) SOI wafer in China.

CTOnews.com learned from the article that the relevant scientific research team, based on the 300 mm SOI R & D platform of the National Key Laboratory of Integrated Circuit Materials, successively solved many core technical problems such as low oxygen and high resistance crystal preparation, low stress and high resistivity polysilicon film deposition, and non-contact planarization required for 300 mm RF-SOI wafers, realizing a major breakthrough in domestic 300mm SOI manufacturing technology from scratch.

It is reported that in order to prepare low oxygen and high resistance substrates suitable for 300mm RF-SOI, the team independently developed a three-dimensional heat and mass transfer model for crystal growth coupled with transverse magnetic field, and revealed for the first time the influence mechanism of crystal induced current on convection and heat and mass transfer in silicon melt and the transport mechanism of oxygen impurities near the crystal interface. Relevant achievements were published in the top journals in the field of crystallography.

According to the official, polysilicon layer used as charge trapping layer is the key technology to improve the RF performance of RF-SOI devices. Parameters such as grain size, orientation, grain boundary distribution and polysilicon resistivity are closely related to charge trapping performance.

In addition, due to the polysilicon/silicon composite structure, silicon wafer stress is extremely difficult to control. The team found a suitable process window for manufacturing polysilicon layers suitable for 300 mm RF-SOI wafers, achieving manual adjustment of polysilicon layer thickness, grain size, crystal orientation and stress.

▲ Figure 1 (a) shows the SEM image of the deposited polysilicon film surface; Figure 1 (b) shows the TEM structure of the polysilicon section; Figure 1 (c) shows the longitudinal resistivity distribution of the polysilicon film and the substrate. During the preparation of 300 mm RF-SOI wafers by Shanghai Microsystems Institute of Chinese Academy of Sciences, the team independently developed a non-contact planarization process based on high temperature heat treatment to achieve atomic-level surface planarization of SOI wafers.

▲ Figure 2. (a) China's first 300 mm RF-SOI wafer;(b) RF-SOI wafer section TEM photos;(c) RF-SOI wafer top silicon thickness distribution;(d) RF-SOI wafer surface AFM map, the source of the Chinese Academy of Sciences Shanghai Institute of Microsystems official said that RF-SOI wafers have become the mainstream substrate material for RF applications, accounting for more than 90% of the market share of RF front-end chips such as switches, low noise amplifiers and tuners.

With the full deployment of 5G network, the demand of Mobile device for RF module continues to increase, and the RF front-end chip manufacturing process is transitioning from 200mm to 300mm RF-SOI. Taking this opportunity, domestic mainstream integrated circuit manufacturing enterprises are also actively expanding the foundry capability of 300mm RF-SOI process.

The independent preparation of 300 mm RF-SOI wafers will strongly promote the coordinated and rapid development of the whole industry chain of domestic RF-SOI chip design, foundry and packaging, and provide a solid guarantee for the supply security of domestic SOI wafers.

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