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This article introduces the relevant knowledge of "what is the influence of crystal oscillator on stm32 serial data transmission". In the operation of actual cases, many people will encounter such a dilemma, so let the editor lead you to learn how to deal with these situations. I hope you can read it carefully and be able to achieve something!

Generally speaking, the external crystal oscillator of stm32 is 8m, but if you want to change the external crystal oscillator, you need to change the configuration file as well.

As shown in the figure, change 8000000 to 16000000

Figure 3 system clock configuration

Modify the SetSysClockTo72 (void) file as follows:

Static void SetSysClockTo72 (void)

{

_ _ IO uint32_t StartUpCounter = 0, HSEStatus = 0

RCC- > CR | = (uint32_t) RCC_CR_HSEON)

Do

{

HSEStatus = RCC- > CR & RCC_CR_HSERDY

StartUpCounter++

} while ((HSEStatus = = 0) & & (StartUpCounter! = HSE_STARTUP_TIMEOUT))

If ((RCC- > CR & RCC_CR_HSERDY)! = RESET)

{

HSEStatus = (uint32_t) 0x01

}

Else

{

HSEStatus = (uint32_t) 0x00

}

If (HSEStatus = = (uint32_t) 0x01)

{

FLASH- > ACR | = FLASH_ACR_PRFTBE

FLASH- > ACR & = (uint32_t) ((uint32_t) ~ FLASH_ACR_LATENCY)

FLASH- > ACR | = (uint32_t) FLASH_ACR_LATENCY_2

RCC- > CFGR | = (uint32_t) RCC_CFGR_HPRE_DIV1

RCC- > CFGR | = (uint32_t) RCC_CFGR_PPRE2_DIV1

RCC- > CFGR | = (uint32_t) RCC_CFGR_PPRE1_DIV2

# ifdef STM32F10X_CL

RCC- > CFGR2 & = (uint32_t) ~ (RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |

RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC)

RCC- > CFGR2 | = (uint32_t) (RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |

RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5)

RCC- > CR | = RCC_CR_PLL2ON

While ((RCC- > CR & RCC_CR_PLL2RDY) = = 0)

{

}

RCC- > CFGR & = (uint32_t) ~ (RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL)

RCC- > CFGR | = (uint32_t) (RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 |

RCC_CFGR_PLLMULL9)

# else

/ / 16MHZ2 frequency division is changed as follows to add RCC_CFGR_PLLXTPRE_HSE_Div2

RCC- > CFGR&= (uint32_t) ((uint32_t) ~ (RCC_CFGR_PLLSRC) | RCC_CFGR_PLLXTPRE |

RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL))

RCC- > CFGR | = (uint32_t) (RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9)

# endif

RCC- > CR | = RCC_CR_PLLON

While ((RCC- > CR & RCC_CR_PLLRDY) = = 0)

{

}

RCC- > CFGR&= (uint32_t) (uint32_t) ~ (RCC_CFGR_SW))

RCC- > CFGR | = (uint32_t) RCC_CFGR_SW_PLL

While (RCC- > CFGR & (uint32_t) RCC_CFGR_SWS)! = (uint32_t) 0x08)

{

}

}

Else

{

}

}

If you use keil, change the xtal in target to 16Mhz.

The above is only for the passive crystal oscillator, but for the active crystal oscillator, the connection method and the passive crystal oscillator are different. The active crystal oscillator sends a pulse signal from the outside, input through oscin, and oscout is suspended. At this time, in the startup file system_stm32f0xx.c, in the SetSysClock function, add

/ * Disable HSI*/

RCC- > CR | = (uint32_t) RCC_CR_HSEBYP)

/ * Enable HSE * /

RCC- > CR | = (uint32_t) RCC_CR_HSEON)

Don't get the order wrong, just do it.

HSEBYP is the HSI bypass, as mentioned in the manual, the bypass is not the external crystal oscillator loss, but the internal crystal oscillator loss, so the HSEBYP setting 1 means disabled HSE, disabled HSI.

The active crystal oscillator is generally more expensive than the passive crystal oscillator. The advantage is that the output waveform is perfect and is not disturbed by parasitic capacitance. The disadvantage is that the output frequency can not be adjusted. The passive crystal oscillator is generally ten times better than the internal crystal oscillator, and is triggered by the internal pulse.

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