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What is the difference between Open-Drain and Push-Pull in GPIO

2025-01-16 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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This article introduces the relevant knowledge of "what is the difference between Open-Drain and Push-Pull in GPIO". In the operation of actual cases, many people will encounter such a dilemma, so let the editor lead you to learn how to deal with these situations. I hope you can read it carefully and be able to achieve something!

[Open-Drain and Push-Pull]

The function of GPIO, in short, can be configured as input or output according to your own needs. (General Purpose Input Output, abbreviated as GPIO or bus extender, simplifies the expansion of the Imax O port by using the industry standard I2C, SMBus ™or SPI ™interface. GPIO products can provide additional control and monitoring functions when the microcontroller or chipset does not have sufficient I _ hand O ports, or when the system requires remote serial communication or control.) However, when configuring GPIO pins, it is common to see two modes: open-drain (drain open circuit) and push-pull (push-pull). What are the differences and connections between the two modes? here are some materials to explain in detail:

[Push-Pull push-pull output]

Principle:

The output device means that there is a pair of complementary MOSFET integrated inside the output pin, which outputs high level when Q1 is turned on and Q2 is turned off, while low level is output when Q1 is turned on and Q2 is turned on. The Push-Pull output actually uses two transistors (transistor) internally, which are called Top-Transistor and Bottom-Transistor respectively. The corresponding level is output by switching the corresponding transistor. Top-Transistor is on (Bottom-Transistor is off), the output is high; Bottom-Transistor is on (Top-Transistor is off), output is low. Push-pull can leak current (sink current) and collect current (source current). It may or may not have another state: high impedance (high impedance) state. No additional pull-up resistors are required unless the Push-pull needs to support additional high impedance states.

Features: in the CMOS circuit should be called CMOS output is more appropriate, because in the CMOS push-pull output capacity can not be made as large as bipolar. The output capacity depends on the area of the IC internal output pole N tube P tube. Push-pull is the most widely used output stage design method in CMOS circuits.

Advantages: (1) can absorb current, can also pass through current; (2) compared with open-leakage output, the high and low level of push-pull is set by the power supply of IC, so it can not simply do logic operation.

Disadvantages: devices with only one push-pull output on a bus

[Open-Drain open-leak output]

Principle:

The open-drain circuit refers to the circuit output by the drain pole of MOSFET. It refers to the MOSFET (Q1) with an N-channel between the internal output and the ground. These devices can be used in level conversion applications. The output voltage is determined by Vcc. The Vcc can be greater than the input high voltage VCC (call UP-Translate) or lower than the input high voltage VCC (call Down-Translate).

Open-Drain output, is less than push-pull top transistor, only that bottom transistor. (as in push-pull) when bottom transistor is off, the output is high. It is impossible to output a high level here. If you want to output a high level, you must connect an external pull-up resistor (pull-up resistor). Open-drain can only leakage current (sink current), if you want to collect current (source current), you need to add a pull-up resistor.

Advantages:

(1) it is very useful for level conversion between various voltage nodes, and can be used for Up-translate and Down-translate conversion of various voltage nodes.

(2) multiple open-leak output Pin pins can be connected to a line to form a "and logic" relationship, that is, the "line and" function. When any one becomes low, the logic on the open-leak line is zero. This is also the principle of judging the bus occupation state by buses such as I2C MagneSMBus.

(3) use the driving ability of the external circuit to reduce the internal driver of the IC. When the internal MOSFET of the IC is turned on, the driving current flows from the external VCC through R pull-up, MOSFET to GND. Only a small gate driving current is needed inside the IC.

(4) the transmission level can be changed by changing the voltage of the pull-up power supply. As shown in the figure, the logic level of the IC is determined by the power supply Vcc1, while the output high level is determined by the Vcc2. In this way, we can use low-level logic to control the output of high-level logic.

The principle of OD output level

Disadvantages: open-drain Pin does not connect the external pull-up resistor, it can only output low level. When the output level is low, the N-channel transistor is turned on, so that there is a continuous current flow between the Vcc' and GND through the pull-up resistor R and the transistor Q1. This will affect the power consumption of the whole system. The current can be reduced by using a larger pull-up resistance. However, a large resistance value will slow down the rise time of the output signal. That is, the resistance value of the pull-up resistance R pull-up determines the speed of the logic level conversion. The higher the resistance value, the lower the speed and the lower the power consumption. And vice versa.

= =

The common mode of GPIO can be configured as open-drain or push-pull. In implementation, it is often configured as open-drain or push-pull by configuring some bits of the corresponding register. When we use CPU to set a bit in the configuration register of those GPIO, the internal implementation of the GPIO hardware IC is to turn the corresponding top transistor on or off. Accordingly, if it is set to Open-D mode, the pull-up resistor is required to achieve, and the high level can be output. Therefore, if the hardware interior (internal) itself contains the corresponding pull-up resistor, the corresponding pull-up resistor will be turned off or on at this time. If there is no corresponding pull-up resistor inside the GPIO hardware IC, then your hardware circuit must provide the corresponding external (external) pull-up resistor. The advantage of push-pull output is its high speed, because the line is driven in two ways. And the circuit with pull-up resistance, even if the fastest speed to increase the voltage, the fastest also need a constant R × C time. Where R is the resistance and C is the parasitic capacitance (parasitic capacitance), including the capacitance of the pin pin and the capacitance of the board. However, the relative disadvantage of push-pull is that it often needs to consume more current, that is, the power consumption is relatively high. The current consumed by the open-drain is relatively small, which is limited by the resistance R, and R cannot be too small, because when the output is low, a lower transistor of sink is required, which means higher power consumption. One of the advantages of open-drain is that it allows you to short multiple open-drain circuits and share a pull-up resistor, which is called a wired-OR connection, and you can make the output low by pulling down the pin pin of any IO. In order to output high levels, all output high levels. This kind of logic, which is the function of "line and", does not need additional gate circuits to implement this part of the logic.

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