Shulou(Shulou.com)11/24 Report--

Thanks to CTOnews.com netizens Wu Yanzu in South China for the delivery of clues! CTOnews.com Sept. 18, July this year, Intel released a new advanced performance extension instruction set (APX) and introduced a new AVX10 instruction set that will provide unified AVX-512 support for P and E cores.

CTOnews.com warned that Intel will not support the first version of AVX10 (AVX10.1) from the sixth generation of Xeon "Granite Rapids" chips, but this version only supports 512bit vector instructions, not the new 256bit vector instructions.

By mid-August, the first version of the AVX10.1 patch was available in GCC 14, and the latest achievement in the popularity of AVX10 is that GNU Assembler (Gas) has initially supported AVX10.1.

It is reported that the original AVX10 GNU assembler support is completed by SUSE's Jan Beulich. SUSE's Jan Beulich said: because this is just a reshaping of some of the functions of AVX512, there is little need to add code.

The main content here is the new test case. In order to be able to reuse some existing test cases, the starting symbols of several of these test cases need to be adjusted. Note that 256 bit and 128 bit tests need to be added here because they need to be run immediately.

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