Shulou(Shulou.com)11/24 Report--

Thanks to CTOnews.com netizen OC_Formula for the clue delivery! CTOnews.com August 20, Samsung Electronics plans to produce the 9th generation of V-NAND flash memory next year, which will follow the two-tier stack architecture, with more than 300 layers, while SK Hynix plans to mass-produce 321-tier NAND flash memory with three-tier stack architecture in the first half of 2025.

In fact, the means to increase the storage density include other schemes in addition to increasing the number of layers. At present, 4bit unit (QLC) 3D NAND flash memory has been commercialized, and SSD has benefited from this has become a "cabbage price".

Although there are signs that SSD prices are starting to rise, several big companies are already working on the next generation of 5-bit units (PLC), and it is believed that people will be able to use larger and faster solid-state drives.

At the FMS 2023 Flash Summit, SK Hynix demonstrated the research results of its new PLC (5-Bit MLC) technology.

The principle of this technology is similar to the Twin BiCS FLASH technology developed by the armor in 2019, which simply uses two 2.5 bit units, so that dual threads writing at the same time must be much faster than 5 bit storage.

In a 5 bit cell, a memory cell can contain 32 different threshold voltages (CTOnews.com Note: 25). Under normal mode, the time required to write and verify 32 different threshold voltages with PLC is nearly 20 times that of TLC, which is obviously unacceptable to users.

Therefore, SK Hynix designed a new type of PLC, which divides a 5bit unit into two 2.5 bit points, each of which also stores 2.5 bit. Then synthesize the data of each point to get 5 bit data, so that the PLC write time is roughly the same as that of TLC (3bit unit).

In fact, Solidigm showed the first SSD with PLC-NAND a year ago, which uses the same 192 layers of flash memory as the current QLC-NAND, but because each cell consists of 5 bit (instead of 4 bit) points, its density increases to 23.3 Gbit / mm ², a record; and with the 321-layer 9-generation new TLC-NAND, SK Hynix is expected to reach a density of 20 Gbit / mm ²or more. Of course, more layers also mean more work steps and higher costs, and early products are expected to remain expensive.

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