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The read delay has been shortened to 18ns, and the Institute of Microelectronics, Chinese Academy of Sciences has made important progress in the field of new memory.

2025-04-06 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >

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Shulou(Shulou.com)11/24 Report--

CTOnews.com, July 19, the Institute of Microelectronics of the Chinese Academy of Sciences issued an article today that the academician team of the Institute of Microelectronics Liu Ming proposed a non-fine wire gated resistive memory based on TiN/ TiOxNy / TiOx / NbOx / Ru structure, which is implemented on a 16-layer three-dimensional vertical structure.

According to reports, the memory achieves an increase of 50 times the open-state current density and achieves high nonlinearity (> 5000). The formation of the peak barrier in the TiOx effectively improves the nonlinearity of the device. The first-principles calculation results show that the oxygen vacancy polymerization energy of Nb2O5 is positive, which indicates that the oxygen vacancy is not easy to accumulate, and the device can work at higher current without breakdown, thus achieving high current density.

▲ figure (a) TEM section view of 16-layer three-dimensional vertical RRAM, figure (b) I-murv characteristic curve the Institute of Microelectronics of the Chinese Academy of Sciences said that due to the increase of current, the reading delay of the device has been reduced to 18ns. This work provides a possible way to realize 3D VRRAM with high speed and high density.

According to CTOnews.com query, the result was selected into 2023 VLSI with the title "16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (> 5000) and Ultra-low Leakage Current (~ pA) Self-Selective Cells". Ding Yaxin, a doctoral student of the Institute of Microelectronics, is the first author, a researcher of Microelectronics Soloqing and Professor Xue Kanhao of Huazhong University of Science and Technology are the communication authors.

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