Shulou(Shulou.com)11/24 Report--

Thanks to CTOnews.com netizens Xiao Zhan cut, South China Daniel Wu's clue delivery! CTOnews.com, June 24, according to foreign technology media MacRumors reports, the iPhone 15 Pro and iPhone 15 Pro Max launched by Apple this year are both equipped with A17 Bionic processors and are different from the A17 version to be launched next year: the former uses TSMC N3B process, while the latter uses enhanced N3E process.

Compared with the A14, A15 and A16 chips based on the 5nm process, the A17 Bionic launched by Apple uses 3nm manufacturing process for the first time.

It is reported that the A17 Bionic used in the iPhone 15 Pro series uses the N3B process, while the model to be launched next year will fully switch to the N3E process.

CTOnews.com previously reported that TSMC talked about 3nm basic (N3B) nodes and some data of 3nm enhanced (N3E). To put it simply, N3E is a slightly cheaper version of N3B, and it can be said that it pays more attention to power control than performance on the final chip. For the new N3E node, the size of the high-density SRAM bit cell has not been reduced, still 0.021 μ m ², which is exactly the same as the bit cell size of the N5 node.

During the IEDM, TSMC revealed that the CGP of N3B is 45nm, which is by far the densest. This leads the 50nm CGP of Intel 4, the 54nm CGP of Samsung 4LPP and the 51nm CGP of TSMC N5.

Because N3B failed to meet the performance, power and output targets of TSMC, N3E was developed. The aim is to fix the shortcomings of N3B.

The first major change is the slight relaxation of metal spacing. Instead of using multiple patterned EUV on M0, M1 and M2 metal layers, TSMC flinched and switched to a single pattern.

During the IEDM, TSMC revealed that the bit size of N3E is 0.021 μ m2, which is exactly the same as N5. This is a devastating blow to SRAM. Because of the yield, TSMC abandoned the SRAM unit size instead of the N3B.

The N3B is actually equipped with SRAM scaling, and its unit size is only 0.0199 μ m ², which is 5% smaller than the previous version. The memory density (ISO-assist circuit overhead) of N3E is approximately 31.8 Mib / mm ².

Related readings:

"sources say Apple has booked nearly 90% of TSMC's 3nm capacity this year for iPhone 15 Pro series A17 processors."

"it is reported that many of TSMC's customers have revised their process plans, and almost all of the customers who have adopted 4/3nm have 2nm projection plans."

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