Shulou(Shulou.com)11/24 Report--

CTOnews.com, May 29, Arm today released its 2023 mobile processor core designs: Cortex-X4, A720 and A520, which are based on Arm v9.2 architecture and support only 64-bit instruction sets and are no longer compatible with 32-bit applications. Arm said that these cores have significantly improved in terms of performance and efficiency, as well as enhanced security and scalability.

Cortex-X4 is Arm's flagship core, also known as the super-large core, which improves the performance of last year's X3 core by an average of 15% and reduces power consumption by 40% at the same frequency. X4 cores are mainly aimed at high-performance requirements, and generally only one or two such cores are used in the chip.

The physical size of Cortex-X4 has increased by less than 10%, making it the most efficient Cortex-X kernel ever. 2MB's L2 cache size brings higher performance, increasing the number of arithmetic logic units (ALU) from 6 to 8, adding an additional branch unit (a total of 3), adding an additional multiplication accumulator unit, and pipelined floating-point and square root operations.

Cortex-A720 is the performance core of Arm. At the same power as last year's A715, the efficiency of the core has increased by 20%, and the performance has also improved. The A720 core mainly balances performance and power consumption, and there are usually four or six such cores used in the chip. The A720 core also makes some improvements at the front end, such as shortening pipeline length, optimizing branch prediction, and pipelining floating-point division and square root operations.

Cortex-A520 is the efficiency core of Arm, which is 22% more efficient than last year's A510 core with the same performance. The A520 core mainly saves power consumption and area, and there are usually two or four such cores in the chip. The A520 core uses a merged core architecture, which can share L2 cache, L2 conversion backup buffer and vector data path in a complex. The A520 core also optimizes branch prediction at the front end and removes or reduces some performance features.

CTOnews.com noted that in addition to the CPU core, Arm has updated the dynamic sharing Unit (DSU-120), a module that integrates multiple CPU cores with L3 memory systems, control logic and external interfaces to form a multi-core cluster. DSU-120 has a number of improvements over DSU-110, such as support for up to 14 CPU cores (up from 12) and L3 cache for up to 32MB.

According to Arm, these new CPU core designs are designed to respond to the changing needs of the mobile device market, not only for higher performance, but also for better efficiency, security and scalability. With the increasingly stringent requirements of the Android system for 64-bit applications, Arm believes that the 64-bit transition has "completed the task" and no longer needs to support 32-bit applications.

These new CPU core designs are expected to appear in the new chips by the end of this year or early next year, and MediaTek has said it will use the technology in its next generation of products.

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