Shulou(Shulou.com)11/24 Report--

Thanks to CTOnews.com netizens Wu Yanzu in South China for the delivery of clues! CTOnews.com May 15, India's Advanced Computing Development Center (C-DAC) announced that it is developing a series of ARM-based CPU, including flagship AUM chips. Now, the company has released the first details of its AUM processor, which is scheduled to be released in 2024 for the HPC field.

According to reports, this flagship chip has 96 ARM cores, 96 GB HBM3, 128 PCIe Gen 5 channels, and the TDP can reach 320W.

C-DAC says it is developing a variety of options for domestic applications, ranging from smart devices, the Internet of things, AR / VR to high-performance computing and data centers.

C-DAC 's Vega series CPU, based on dual-core and quad-core designs, is aimed at entry-level customers who need low-power and low-cost chips and is expected to meet at least 10 per cent of India's chip needs. In addition, the company plans to launch eight-core chips in the next three years as a follow-up to Dhruv and Dhanush Plus chips.

But that's not all. The company now announces that it is developing a high-performance computing chip that is very energy efficient. As part of India's National Supercomputing Task (NSM) program, the chip will target large workloads, or C-DAC AUM processors.

Based on the ARM Neoverse V1 architecture codenamed Zeus, C-DAC AUM has 96 cores, but is divided into two small chips, each containing 48 V1 cores. Each chip has its own memory, I / O, C2C / D2D interconnection, cache, security and MSCP subsystem.

According to reports, they connect the two A48z-based small chips together using the D2D interconnection architecture on the same middle layer. Each chip also carries 96 MB of secondary cache and 96 MB of system cache.

In addition, the C-DAC AUM uses 64 GB of HBM3-5600 memory, while encapsulating 96 GB HBM3 memory and 8-channel DDR5-5200 memory (CTOnews.com Note: up to 16 channels with a total bandwidth of 332.8 GB / s).

Thanks to the triple memory subsystem design, the CPU will carry 64,128 PCIe Gen 5 channels, support CXL, and run on a platform that can contain two of these chips.

The CPU will be manufactured based on TSMC's 5nm process and the frequency range is about 3.03.5 GHz. Pure CPU nodes will provide performance of up to 10 TFLOPs per node, with 4.6 + TFLOPs computing power per slot, and up to 4 standard GPU accelerators in the case of a two-socket server design.

C-DAC said it will also prepare a set of HPC system software and development tools to realize the full potential of its hardware. The company expects to achieve 64 PetaFlops of computing power in India by the end of 2024, while AUM chips are expected to be available in 2023-2024.

Welcome to subscribe "Shulou Technology Information " to get latest news, interesting things and hot topics in the IT industry, and controls the hottest and latest Internet news, technology news and IT industry trends.