Shulou(Shulou.com)11/24 Report--

CTOnews.com, May 9, the Occamy processor supported by the European Space Agency and developed by engineers at the Federal Institute of Technology Zurich and the University of Bologna is now on the chip. It uses two chiplet chips with 21632-bit RISC-V cores, an unknown number of 64-bit FPU, and two pieces of 16GB HBM2e memory from Meguiar.

The core of the processor is interconnected through the intermediary layer, and the dual-block CPU provides 0.75 FP64 TFLOPS performance and 6 FP8 TFLOPS computing power.

Neither ESA nor its development partners have disclosed the power consumption of the Occamy, but the chip is said to use passive heat dissipation, which means it may be a low-power processor.

One of the advantages of a small chip design is that it can later add other small chips to the package to speed up certain workloads when needed. Each Occamy chip has 216RISC-V cores and FPU for matrix operations. In total, about 1 billion transistors are distributed on the small chip of the 73mm2, which is made based on the lattice core 14LPP.

For comparison, the Intel Alder Lake chip size is 163mm2. In terms of performance, the Nvidia A30 GPU has 24GB HBM2 video memory, offering a 5.2 FP64/10.3 FP64 Tensor TFLOPS and a 330swap 660 (sparse) INT8 TOPS.

According to the public information of CTOnews.com inquiry, Occamy CPU, which is mainly developed as part of ESA's EuPilot program, is one of the many chips that ESA is considering for aerospace computing.

It is reported that Occamy can be simulated on fpga, and the implementation has been tested on two AMD Xilinx Virtex UltraScale+ HBM FPGA and Virtex UltraScale+ VCU1525 FPGA.

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