Shulou(Shulou.com)11/24 Report--

CTOnews.com April 11, according to the release of openEuler, RISC-V SIG has recently achieved important results and successfully adapted the openEuler operating system on the computing power SG2042 (EVB) server board.

RISC-V SIG announced the successful adaptation of the openEuler operating system to the SG2042 (EVB) server board. SG2042 hardware features include 120W power consumption, 64 RISC-V cores, 2GHz frequency, high-capacity Cache, PCIe Gen4 interface and DDR4 memory. Based on the LTS version of openEuler 22.03 and the latest innovative version of 23.03, openEuler RISC-V makes an experience image of the SG2042 board, integrates the basic functions of openEuler, and uses the latest manufacturer firmware and kernel branch. After testing, the basic system, wired network, USB interface, PCIE and other components can be used smoothly, and the HDMI can be displayed normally. As a server board, RISC-V SIG is actively exploring its native cloud applications in different scenarios. It is expected that SG2042 will be widely used in the server field as a leading server board in the near future.

CTOnews.com attached calculable SG2042 RISC-V image download address: click this link.

RISC-V SIG plans to combine SG2042 server board with OBS (Open Build Service), make full use of its performance advantages, speed up the construction process of RISC-V software package, and lay the foundation for the improvement of software and hardware ecosystem. At present, the main way for OERV OBS (Open Build Service) to build openEuler Packages is a mixture of qemu user and qemu system, which is also the construction strategy adopted by most RISC-V distributions. Compared with system mode, the performance of user mode is generally more than 5 times higher, and the native build mode of SG2042 has a significant speed advantage compared to qemu user mode. RISC-V SIG connects the SG2042 server board to OERV OBS for construction testing. In the construction of small software packages, for example, coreutils,SG2042 can achieve more than 6 times acceleration, and it only takes more than 300 seconds to complete the build, which is comparable to the speed of native AArch64 and x86room64 architecture. For the construction of large software packages, the acceleration effect is more significant. For example, common glibc and LLVM typically take 1 to 2 days to build in a normal qemu user environment, while SG2042 can shorten this process to less than 2 hours. For large applications like LibreOffice, SG2042 can significantly reduce the build time from about 3 days in a qemu user environment to about 3 hours.

For the comparison of specific data, please refer to the figure above. It is important to note that the time data displayed (in s) comes from the best construction result of OERV OBS, that is, the less time, the faster the construction. In practical use, due to the influence of the number of server-built packages, this comparison is only used as a reference for differences in the use point of view, not strictly controlling the performance evaluation of variables.

At present, the openEuler RISC-V operating system based on SG2042 still has room for optimization in GPU adaptation and cloud native applications, so it is necessary to further enrich the ecological environment of SG2042 as a PC server and improve the stability of some software packages and applications. In addition, RISC-V SIG will take advantage of the support of RISC-V vector extension instructions (RVV 0.7) and use RVV 0.7 GCC to build the entire system to explore more performance potential. In order to achieve this goal, RISC-V SIG will work with the RuyiSDK team of the Institute of Software of the Chinese Academy of Sciences to optimize the application of scientific computing software.

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