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How to deeply understand Makefile files in Redis

2025-01-24 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Database >

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The content of this article mainly focuses on how to deeply understand the Makefile file in Redis. The content of the article is clear and clear. It is very suitable for beginners to learn and is worth reading. Interested friends can follow the editor to read together. I hope you can get something through this article!

Detailed explanation of Makefile file

The contents of the Makefile file for the source code root are as follows:

Default: all.DEFAULT: cd src & & $(MAKE) $@ install: cd src & & $(MAKE) $@ .PHONY: install

The following information can be seen from the code:

The first goal of the file is default, which has no practical use and depends on the all goal

There is no so-called all target in the code, so when we use make directly, we will first call the default target, and then the all target. Because the all target does not exist, the .DEFAULT target will be called instead. In the execution statement of Makefile, $@ represents the target, and $(MAKE) represents make, so the expanded code is as follows, and the reader can compile it by himself. See if the first output statement is the same as what we analyzed.

Cd src & & make all

The install target is similar to the previous one. The final goal is to go to the src/ directory, and then call the Makefile file in that directory, except that the target of the call becomes install. The expanded code is as follows:

Cd src & & make install

When the input parameter is something else, the caller will go to .DEFAULT, and then call the corresponding target of Makefile in the subdirectory. Take clean as an example, the code is as follows:

Detailed explanation of cd src & & make cleansrc/Makefile file

This file is a file that really plays the role of compilation, with a lot of content and complexity, and in order to be compatible with a variety of compilers, there are many branch selection syntax, we only take the gcc compiler under Linux as an example to explain, the rest is no difference, just through the judgment statement to change some compilation parameters.

1. Makefile.dep goal

Before executing the corresponding target, Makefile will execute non-target instructions, such as variable assignments, Shell statements, and so on, so we will find that Makefile files are not executed in full order.

The related code is as follows:

Each variable prototype in NODEPS:=clean distclean# FINAL_CFLAGS STD=-pedantic-DREDIS_STATIC=''WARN=-Wall-W-Wno-missing-field-initializersOPTIMIZATION?=-O2OPT=$ (OPTIMIZATION) DEBUG=-g-ggdb#CFLAGS selects unimportant parameters based on conditions, ignoring unimportant parameters selected by # REDIS_CFLAGS based on conditions Ignore FINAL_CFLAGS=$ (STD) $(WARN) $(OPT) $(DEBUG) $(CFLAGS) $(REDIS_CFLAGS) REDIS_CC=$ (QUIET_CC) $(CC) $(FINAL_CFLAGS) all: $(REDIS_SERVER_NAME) $(REDIS_SENTINEL_NAME) $(REDIS_CLI_NAME) $(REDIS_BENCHMARK_NAME) $(REDIS_CHECK_RDB_NAME) $(REDIS_CHECK_AOF_NAME) @ echo "@ echo" Hint: It 's a good idea to run 'make test' ) "@ echo"Makefile.dep:-$(REDIS_CC)-MM * .c > Makefile.dep 2 > / dev/null | | trueifeq (0, $(words $(findstring $(MAKECMDGOALS), $(NODEPS)-include Makefile.dependif

First of all, add the following basics of Makefile

The format of the findstring function of Makefile is $(findstring FIND, IN), which means to look for FIND in IN. If it is found, it returns FIND. If it cannot be found, it returns empty.

Makefile's words function is used to count the number of words. For example, the return value of $(words, foo bar) is "2".

The MAKECMDGOALS variable of Makefile represents the passed parameters (all)

The default CC for Makefile is cc

The-MM of Makefile is to output a rule for make that describes the dependencies of the source file, but does not contain the system header file

The following information can be summarized:

The all goal in it is the default compilation target we mentioned in the previous section, but if we try to compile it ourselves, we will find that Mr. Makefile.dep is a file, because he first executes the bottom judgment statement, which calls the Makefile.dep target.

Since the value of MAKECMDGOALS is all, which is not in the range of NODEPS, the above ifeq statement holds and calls the Makefile.dep target.

The value of REDIS_CC consists of three variables. QUIET_CC prints debugging information. Readers can go to the source code to see the relevant content. This part is not important. We ignore that the value of CC represents the compiler, and the values in FINAL_CFLAGS are compiled parameters. These values have been extracted from the above code.

To sum up, the function of the Makefile.dep target is to generate the dependencies of all the files ending in .c in the current directory and write them into the Makefile.dep file. The contents of the compiled files are shown below, which looks messy, but the contents actually list the final target files generated by each source file, and list the dependencies it needs.

Acl.o: acl.c server.h fmacros.h config.h solarisfixes.h rio.h sds.h\ connection.h atomicvar.h.. / deps/lua/src/lua.h.. / deps/lua/src/luaconf.h\ ae.h monotonic.h dict.h mt19937-64.h adlist.h zmalloc.h anet.h ziplist.h\ intset.h version.h util.h latency.h sparkline.h quicklist.h rax.h\ redismodule.h zipmap.h sha1.h endianconv.h crc64. H stream.h listpack.h\ rdb.h sha256.hadlist.o: adlist.c adlist.h zmalloc.hae.o: ae.c ae.h monotonic.h fmacros.h anet.h zmalloc.h config.h\ ae_epoll.cae_epoll.o: ae_epoll.c...zipmap.o: zipmap.c zmalloc.h endianconv.h config.hzmalloc.o: zmalloc.c config.h zmalloc.h atomicvar.h

2. General target for generating object files

The code is as follows:

.make-prerequisites: @ touch $@ ifneq ($(strip $(PREV_FINAL_CFLAGS)), $(strip $(FINAL_CFLAGS) .make-prerequisites: persist-settingsendififneq ($(strip $(PREV_FINAL_LDFLAGS)), $(strip $(FINAL_LDFLAGS) .make-prerequisites: persist-settingsendif%.o:% .c. Make-prerequisites $(REDIS_CC)-MMD-o $@-c $& 2 QUIET_INSTALL = @ printf'% b% n'$(LINKCOLOR) INSTALL$ (ENDCOLOR) $(BINCOLOR) $@ $(ENDCOLOR) 1 > & 2Ten Endif

So if we compile directly, we won't see a lot of details, so we can try to modify the Makefile file and define the V variable before the previous code, so we can see the complete compilation information. The modifications are as follows:

V = 'good'ifndef VQUIET_CC = @ printf'% b\ n' $(CCCOLOR) CC$ (ENDCOLOR) $(SRCCOLOR) $@ $(ENDCOLOR) 1 > & 2LINK$ LINK$ (link) = @ printf'% b\ n' $(LINKCOLOR) LINK$ (ENDCOLOR) $(BINCOLOR) $@ $(ENDCOLOR) 1 > & 2itQUIETRESTALL = @ printf'% b% n'$(LINKCOLOR) INSTALL$ (ENDCOLOR) $(BINCOLOR) $@ $(ENDCOLOR) 1 > & 2entendif

I have also written articles related to Nginx compilation before. Here are some differences between the two:

Nginx uses a lot of Shell-related technologies, while Redis rarely uses these

The cross-platform parameters of Nginx are configured through the configuration script, while Redis does this directly in the Makefile file. There is no difference between the two. Nginx uses so many configuration scripts mainly for the sake of strong scalability, while Redis basically doesn't have to consider these, so it's easy to implement.

Because Redis puts some of its logic in the Makefile file, it seems that the Makefile file generated by Nginx is much easier to understand than Redis (Nginx complex logic is in those configuration scripts)

The configuration file generated by Nginx has more than 1000 lines, and the amount of code is much larger than that of Redis, because Nginx lists all the dependent generation methods, while Redis uses Makefile.dep and various% .d files to distribute the dependency information into the intermediate files, which greatly reduces the code amount of Makefile.

Thank you for your reading. I believe you have a certain understanding of "how to understand Makefile files in Redis". Go to practice quickly. If you want to know more about it, you can follow the website! The editor will continue to bring you better articles!

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