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2025-01-18 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >
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CTOnews.com February 19 news, China's Taiwan storage company Huabang Electronics announced to join the UCIe Industry Alliance, combined with its rich 2.5D / 3D advanced packaging experience, Huabang will actively help the promotion and popularization of high-performance Chiplet interface standards.
UCIe is an open interconnection protocol for small chips, which will meet customers' requirements for customized packaging. The UCIe Industry Alliance was established in March 2022 by AMD, Arm, ASE, Google Cloud, Intel, Meta, Microsoft, Qualcomm, Samsung and TSMC. The purpose of the alliance is to promote the standardization of the Chiplet interface specification, and has launched the UCIe version 1.0 specification. As of the publication of CTOnews.com, the number of members of the UCIe Alliance has reached more than 100.
As an open Chiplet interconnection specification, UCIe defines the interconnection between Chiplet in the package to realize the universal interconnection of Chiplet at the encapsulation level and an open Chiplet ecosystem.
After joining the UCIe Alliance, Huabang can assist system single-chip customers (SoC) to design and connect to 2.5D / 3D back-stage processes (BEOL, back-end-of-life).
According to Huabang Electronics, its 3D CUBE-as-a-Service (3D CaaSforce 3D CUBE as a Service) can provide customers with one-stop shopping services and leading standardized product solutions.
In addition to consulting services, it also includes 3D TSV DRAM (aka CUBE) KGD memory chips and 2.5D / 3D back-stage processes optimized for multi-chip devices (using CoW / WoW technology), as well as technical consulting services provided by platform partners at Huabang. This means that customers can easily get complete and comprehensive CUBE product support and enjoy additional services of Silicon-Cap, interposer and other technologies.
"the UCIe specification will enable 2.5D / 3D chip technology to realize its full potential in cloud-to-edge AI applications," said Fan Xiangyun, vice president of Huabang DRAM. "this technology plays an important role in continuing to improve performance and ensuring the affordability of cutting-edge digital services."
"We are pleased to welcome Huabang to the UCIe Alliance," said Dr. Debendra Das Sharma, Chairman of the UCIe Alliance. "as a global provider of high-performance memory solutions with 3D DRAM expertise, we look forward to their contribution to the further development of the UCIe small chip ecosystem."
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