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The Chinese Academy of Sciences has made innovative progress in 3D DRAM research on the new structure of CAA.

2025-01-21 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >

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CTOnews.com, January 10, according to the Institute of Microelectronics of the Chinese Academy of Sciences, with the continuous miniaturization of size, the storage capacitance limitation of 1T1C dynamic random access memory (DRAM) becomes more and more obvious, which leads to the miniaturization bottleneck of traditional 1T1C-DRAM. 2T0C-DRAM based on indium gallium zinc oxide (IGZO) transistor is expected to break through the miniaturization bottleneck of 1T1C-DRAM and play a greater advantage in 3D DRAM.

However, the current research work is based on planar IGZO devices, and the cell size of 2T0C (about 20F2) is much larger than that of 1T1C under the same feature size (6F2), which makes IGZO-DRAM lack the advantage of density.

Aiming at the density problem of planar structure IGZO-DRAM, on the basis of vertical annular channel structure (Channel-All-Around, CAA) IGZO FET, academician team Liu Ming of Microelectronics key Laboratory of Institute of Microelectronics studied the influence of prestack interlayer dielectric layer process of second layer devices, and verified the reliability of CAA IGZO FET in 2T0C DARM application.

The optimized cross-section electron microscope diagram and transfer output curve of ▲ CAA IGZO FET show excellent reliability. After 10000 seconds gate bias stress stability test (including positive and negative bias conditions), the threshold voltage drift is less than 25mV, and there is no performance degradation after 1012 write and erase operations. The research results are helpful to promote the realization of 4F2 IGZO 2T0C-DRAM unit.

The reliability test results of ▲ CAA IGZO FET CTOnews.com learned that the article "Inter-Layer Dielectric Engineering for Monolithic Stacking 4F2-2T0C DRAM with Channel-All-Around (CAA) IGZO FET to Achieve Good Reliability (> 104s Bias Stress, > 1012 Cycles Endurance)" based on this result was selected as 2022 IEDM. Chen Chuanke, a graduate student of the Institute of Microelectronics, is the first author, while Li Ling and Geng Jie, an associate researcher of the Institute of Microelectronics, are the authors of the communication.

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