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Changdian Science and Technology XDFOI Chiplet series process to achieve stable mass production

2025-02-28 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >

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CTOnews.com January 5 news, Changdian Technology announced that the company's XDFOI Chiplet high-density multi-dimensional heterogeneous integration series process has entered a stable mass production stage according to plan, simultaneous realization of international customers 4nm node multi-chip system integration package products ship, the maximum package area is about 1500mm ²system-level package.

Changdian Technology launched a high-density multi-dimensional heterogeneous integration technology platform XDFOI for Chiplet (small chip) in July 2021, which uses the concept of collaborative design to realize the integration and testing of chip products, covering 2D, 2.5D and 3D Chiplet integration technologies.

Through the technology of heterogeneous integration of small chips, XDFOI places one or more logic chips (CPU / GPU, etc.) on the organic rewiring stack intermediary layer (RDL Stack Interposer,RSI), as well as I / O Chiplet and / or high-bandwidth memory chips (HBM) to form a highly integrated heterogeneous package. On the one hand, the high-density fcBGA substrate can be "slimmed down", part of the wiring layer can be transferred to the organic rewiring stack intermediary layer substrate, and the advantages of the organic rewiring stack intermediate layer minimum linewidth 2 μ m and multi-layer rewiring can be used to reduce the interconnection distance between chips and achieve more efficient and flexible system integration. On the other hand, part of the interconnect over the SoC can be transferred to the organic rewiring stack intermediary layer, thus achieving Chiplet-based architectural innovation and ultimately achieving the dual advantages of performance and cost.

CTOnews.com learned that long Electric Technology XDFOI technology can control the thickness of the organic rewiring stack intermediate layer within 50 μ m, and the center distance of μ Bump is 40 μ m, realizing high-density process integration in thinner and smaller unit area, achieving higher integration, stronger module function and smaller package size. At the same time, metal deposition can be carried out on the back of the package, which can not only effectively improve the heat dissipation efficiency, but also enhance the electromagnetic shielding ability of the package according to the design needs and improve the yield of the chip.

Changdian Technology XDFOI Chiplet high-density multi-dimensional heterogeneous integration process has been applied in high-performance computing, artificial intelligence, 5G, automotive electronics and other fields.

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