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Institute of Microelectronics, Chinese Academy of Sciences has developed high-performance monocrystalline silicon channel 3D NOR memory

2025-04-02 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > IT Information >

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Thanks to CTOnews.com netizen grass Luo Yuzi for the clue delivery! CTOnews.com, Nov. 16, according to the official website of the Chinese Academy of Sciences, the Institute of Microelectronics has developed a high-performance monocrystalline silicon channel 3D NOR memory.

NOR flash memory plays an important role in artificial intelligence, automotive electronics and industrial fields because of its high speed, high reliability and long service life. At present, the commonly used planar NOR flash has a bottleneck in the size reduction of less than 50 nm technology, so it is difficult to further improve the integration density, optimize the device performance and reduce the manufacturing cost. In order to break through the above bottlenecks, researchers have proposed a variety of 3D NOR (3D NOR) devices based on polysilicon channel, but the low channel mobility and slow reading speed of polysilicon channel affect the overall performance of NOR devices.

Recently, Zhu Huilong, a researcher at the Integrated Circuit pilot Technology Research and Development Center of the Institute of Microelectronics of the Chinese Academy of Sciences, used the new vertical transistor technology developed to fabricate high-performance single crystal channel 3D NOR flash memory devices. The transistor superimposed on the top and bottom of the device not only has the high performance advantage of monocrystalline silicon channel, but also has the advantage of low manufacturing cost of three-dimensional integration. CTOnews.com learned that the device can achieve the same or better performance than monocrystalline silicon channel planar NOR flash devices, while significantly increasing memory integration density and memory capacity without upgrading the lithography machine. The 3-D 3-D NOR flash memory array developed by the scientific research team achieves normal reading, writing and erasing, and achieves the goal that the read current, programming and erasing speed are equivalent to that of two-dimensional NOR flash memory devices, and the new process is compatible with the mainstream silicon-based process and is convenient for application.

As cover articles and Editors Picks articles, the related research results were published in Electronic Devices KuaiBao (IEEE Electron Device Letters) entitled A Novel 3D NOR Flash with Single-Crystal Silicon Channel: Devices, Integration, and Architecture. The research work is supported by the independent deployment project of the Chinese Academy of Sciences.

Paper link

Figure 1. Monocrystalline silicon 3D NOR circuit architecture (top) and vertical channel transistor structure (bottom) published on the Electron Device Letters cover

Figure 2. Monocrystalline silicon channel 3D NOR devices and electrical experimental results: (a) device TEM screenshot (left) and channel local magnification (right), (b) programming characteristics, (c) erasure characteristics

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