Shulou(Shulou.com)11/24 Report--

CTOnews.com Sept. 19, Arm recently launched the next generation of data center chip technology Neoverse V2. At the press conference, Dermot O'Driscoll, vice president of product solutions for Arm, answered questions about RISC-V.

Dermot O'Driscoll first acknowledged that RISC-V was promoting "some competition" with British chip designers, saying that "it can help us all focus and ensure that we do better".

O'Driscoll then highlighted the strength of Arm's intellectual property, licensing, customer relations and software ecosystem, saying that although RISC-V has existed since 2010, the free and open instruction set architecture (ISA) has only recently entered commercial products.

Chris Bergey, senior vice president and general manager of Arm's infrastructure business, also said: "We really don't think RISC-V is our important competitor in the data center now or in the near future."

Bergey believes that if you are willing to develop your own CPU kernel rather than buy and comply with the Arm architecture license, then RISC-V may be a good choice

While Arm may not currently see RISC-V as a threat, O'Driscoll said the company "will definitely keep a close eye on the direction of RISC-V".

CTOnews.com learned that in July this year, Calista Redmond, CEO of RISC-V International, revealed at the embedded World Exhibition that there were 10 billion RISC-V cores on the market.

In addition, more and more technology enterprises or departments are choosing RISC-V. SiFive, a well-known US RISC-V chip designer, announced today that it has been selected by NASA to provide core CPU for its next generation of high-performance aerospace computing (HPSC) processors.

Dylan Patel, an analyst at semiconductor industry analyst SemiAnalysis, said Apple is shifting its core instruction set of embedded chips from ARM to RISC-V, and Google will also apply some of the designs from the SiFive X280 core to TPU.

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