Shulou(Shulou.com)11/24 Report--

September 16 news, yesterday, Arm announced its data center chip technology Neoverse series roadmap update.

Arm is innovating rapidly across the infrastructure market, with a roadmap that includes the V-Series for cloud, high-performance computing (HPC) and artificial intelligence (AI); the N-series for cloud, 5G, network and edge; and the E-series for 5G, network and infrastructure edge.

Specifically, Arm announced the launch of the Neoverse V2 platform, codenamed "Demeter", which has been built for several years; next year, its N-series product line will be updated, and nearly 20 partners are currently designing based on the N2 platform, and the new N-series is already under development. Similarly, Arm has enabled the E2 platform and plans to update the E-series.

1. Neoverse V2 platform release, performance, energy efficiency, scalability upgrade Dermot O'Driscoll, vice president of product solutions, Arm Infrastructure Unit, said that Neoverse V2 has a leading edge in providing excellent performance, scalability and efficiency for cloud workloads.

Single-chip performance and single-threaded performance are two key indicators for cloud decision makers. Single-threaded performance makes it clear whether workloads that require the most "scaling" and high performance requirements can be migrated to Arm. High single-chip performance enables it to maximize investment value through a large number of "scale-out" workloads running on the platform.

Very large Internet companies are very concerned about TCO or TCO spending, and pay more attention to the performance that these TCO spending can bring, which is the key to their profitability. And the Neoverse V series is good at this.

Arm launched the Neoverse V2 platform, thanks to its close cooperation with customers on their future design requirements, Arm received V2-related feedback including "want to improve the performance of cloud workloads", "continue to promote single-threaded performance while balancing power and area" and "ship as soon as possible to help us quickly expand the market!" Arm has done all three.

For cloud workloads, the most basic requirement is strong integer performance, good scalability, and efficient for cloud operators, because high energy efficiency allows cloud providers to provide more cores and host more customers on each server, which helps reduce costs.

Neoverse V2 will provide market-leading integer performance. Currently using SPEC Integer Rate to measure estimates, and has been using the various cloud infrastructure workloads in the model to adjust the micro-architecture, Dermot O'Driscoll says they are very excited by the entire series of results.

In addition to integer scalability, modern cloud applications also have large working datasets. It would be a huge advantage to keep as much data as possible close to CPU. For this reason, Arm adds a dedicated L2 cache for 2MB in Neoverse V2. This is twice as large as the L2 on V1, and the load with latency remains the same, resulting in significant performance improvements for cloud applications such as MySQL and Memcached.

At the same time, vector performance is important for workloads like HPC that are rapidly migrating to the cloud. Arm has completed the transition from SVE to SVE2 on Neoverse V2, and SVE2 can help meet more non-HPC ML type workloads while adding more encryption instructions. Arm also reconstructs the vector engine into 4-channel 128bits and adjusts the microarchitecture to improve its effective throughput.

At the system level, it is very important to be able to support a large number of DRAM. On the IO side, they want to be able to connect GPU, TPU, and NVMe-based SSD across the IO bus, so the bus should be fast and support high bandwidth.

With the V2 platform, partners have been able to take advantage of Neoverse N2-enabled system IP backplanes, including CMN mesh, MMU, GIC, and NI non-consistent interconnects. CMN-700 mesh interconnects support system-level caching up to 512 MB per bare chip, and current CMN-700-based designs add system-level caching per core to improve cloud native workload performance.

CMN-700 supports 2.5D designs, and its platform can transition to 3D at any time, pushing the cache level of each core to a new high. CMN-700 also supports mesh bandwidth of up to 4TB per second. A HBM2e memory stack needs to achieve 0.5TB per second bandwidth.

Customers also want Armv9-specific security features and a highly competitive system platform. In response, some key Armv9 security enhancements have been introduced in Neoverse V2, mainly to protect against memory attacks, which are the most common types of attacks.

Four key principles of Arm Neoverse's new products Arm Neoverse's new products are based on several key principles and will continue to provide the performance, efficiency and dedicated processing power required by the infrastructure market.

The first is scalable efficiency. Two years ago, Arm introduced the core design principles of the V, N and E series. Since then, a large number of solutions based on this kind of computing have been launched one after another.

Another key principle is technological leadership. Arm has set a number of industry firsts: the first CPU; with a total memory bandwidth of more than 1TBffg'gv'b per second can be configured with more than 100 cores of CPU on a single bare chip, with 128 cores; the first CPU; to bring DDR5 and PCIe Gen5.0 to market is the first CPU to break a 500 integer run score in the SPEC CPU 2017 benchmark.

The third is the pace of rapid innovation. Today, most of these CPU are still delivered as a single chip, but that is changing rapidly. Cloud gg service with Graviton3 released GA version this year, in which Graviton3 uses 7 Chiplet. Accelerated computing combines computing Chiplet with accelerator Chiplet, such as NVIDIA's Grace Hopper super chip. That is why Arm became a founding member of UCIe.

Arm and its partners are involved in promoting a variety of important interconnection technologies. For many years, Arm has been committed to developing and enhancing AMBA CHI, which is an important protocol for high-speed, low-latency chip-to-chip communication. Today, Arm partners are working with the UCIe community using AMBA CHI,Arm in the CMN series.

Arm is also a member of CXL and sees it as a key interconnection technology for bridging chip-to-chip solutions, such as connecting extended memory, multiple GPU or TPU to a compute node.

Brian Jeff, Senior Director of Product Management of Arm Infrastructure Division, revealed that the current generation of Neoverse system bus supports CXL 2.0, and hopes to support CXL 3.0 in the new generation of system bus. At that time, it is expected to use its new generation bus technology through Neoverse V2. According to his observation, the current memory expansion use case still has a lot of requirements for CXL 2.0, and he expects some designs in the super-large market to use CXL for these purposes.

It is reported that this result can be achieved when Arm partners choose a scalable efficiency computing foundation and use interconnection technologies such as CMN to increase their dedicated processing capacity. This reflects the diversity of solutions and can only be achieved on the Arm architecture.

The fourth and final principle of the Arm Neoverse platform is to build a unique developer ecosystem. Arm SystemReady aims to create a "boot-on" world of software, and Arm will continue to work with ecosystem and open source community exhibitions to optimize it.

Arm Neoverse has achieved several milestones this year. Chris Bergey, senior vice president and general manager of the infrastructure division of Arm, also reviewed a number of landmark achievements made by Arm Neoverse this year, including:

1. Globally, Arm has been used in various major public clouds, including AWS, Microsoft, Google, Alibaba, Oracle and other technology giants. This means that Arm Neoverse is now available to every developer around the world.

2. Arm is everywhere in the field of 5G RAN. At the Mobile World Congress, Dell announced cooperation with Marvell, and Qualcomm also reached cooperation with Rakuten and HPE. They are working with Nokia, Lenovo, Samsung and other companies to work on many more exciting projects.

3. NVIDIA released Grace for AI and high performance computing (HPC).

4. Gradually step into the more traditional field of "enterprise". VMware uses DPU to carry out Monterrey projects. RedHat's OpenShift supports the Arm architecture. SAP HANA is migrating its cloud infrastructure to AWS Graviton. In June, HPE launched the ProLiant 11th generation platform with an Arm Neoverse-based Ampere Altra processor.

"We have reached a turning point to make a fresh start. Arm architecture is the cornerstone of the future of global computing!" Chris Bergey said.

In the Chinese market, Arm Neoverse is also strong. In addition to big companies, some startups are also starting to design chips based on Arm Neoverse. For example, Yuxian Microelectronics and Hongjun Microelectronics are committed to the development of cloud native server CPU, while Cloud Leopard Intelligence is mainly aimed at DPU, and they are developing products based on Neoverse N2, Frank Zou, global vice president of Arm Infrastructure, said in an interview.

Arm's V-Series core, Neoverse V1 in AWS Graviton3 and Neoverse V2 in NVIDIA Grace will provide the best single-threaded performance on the market today. Ampere Altra Max and Alibaba's Yitian 710 will continue to provide the best single-chip throughput.

Dermot O'Driscoll also talked about how Arm builds software ecological advantages. Arm has been working for years to implement and optimize full-stack solutions running on the Arm architecture, from architecture and IP to technology libraries, runtime environments, and compilers, enabling a variety of infrastructure software to extract maximum performance.

The next development trend is machine learning (ML). Just as Java accounts for a large proportion of today's cloud workloads, ML is becoming the workload of choice for the future. In ML, Arm can do the same for BERT. Its V1 core has a set of features specifically designed to enhance the performance of ML applications.

Arm Neoverse adds Bfloat16 (BF16) to the architecture: adjusts V1, N2 and subsequent micro-architectures to improve BF16 execution through BERT, adds BF16 support for the Arm computing library (ACL), integrates ACL into the oneDNN ML framework, and the oneDNN framework is used with Tensorflow to run BERT.

Running BERT on the AWS EC2 C7g based on the V1 core and comparing it with the C6i using the latest Xeon core, the BF16-optimized stack performance on the Arm architecture is 80 per cent higher than that of Intel. The addition of BF16 and Int8 MatMul to V1 means that the ML model can plant memory more compactly, requiring less memory bandwidth, and the ML performance of Graviton3 is three times that of Graviton2.

When asked about the competition for RISC-V instruction set architecture, Dermot O'Driscoll believes that if RISC-V is to be more competitive in terminal or cloud applications, it will require years of investment in architecture, software, and standards, and probably a governance model similar to Arm.

Conclusion: Arm provides another path to sustainable development for cloud platforms. As you can see, instead of building standard products for traditional markets, Arm works closely with major market participants in cloud, HPC, and wireless infrastructure so that they can truly understand their workloads and challenges and be customized to specific market needs.

From mobile phones, computers, AR / VR headsets, Internet of things devices, cars to cloud computing, Arm can be seen everywhere and available to developers around the world. Today, Arm not only supports load balancing and redundancy that many cloud platforms and enterprises want, but also provides another sustainable path for developers.

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