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This article introduces what is the FPGA chip in the FPGA foundation, the content is very detailed, interested friends can refer to, hope to be helpful to you.

Brief introduction of FPGA Chip

Before introducing the FPGA chip, let's first introduce the equivalent circuit.

First explain the "equivalent".

Equivalence means the same utility. The popular explanation is that you don't care about the process, and the result is the same.

Figure 1: walking path diagram

For example: Xiao Ming is at point A now and wants to go to point C. From figure 1, we simply analyze that it can be point A-> point B-> point C, or point A-> point D-> point C. If Xiao Ming is not tired, he can also point A-> point B-> point A-> point D-> point C. In the case that we do not consider the non-process, we only consider the position of the last Xiaoming, then no matter which scheme, the final result is the same.

In the design and analysis of circuits, we often introduce the concept of equivalence to solve complex problems. For example: Norton Theorem (Nortons theorem) and Thevenin Theorem (Thevenin's theorem). Here, these two theorems are not introduced too much, and readers who are interested can query them on their own.

Black box testing, also known as functional testing, is used to test whether each function can be used properly. In the test, the program is regarded as a black box that can not be opened, and the program interface is tested without considering the internal structure and internal characteristics of the program. It only checks whether the program function is used normally in accordance with the requirements specification, and whether the program can properly receive input data and produce correct output information. Black box testing focuses on the external structure of the program, does not consider the internal logical structure, and mainly tests the software interface and software functions.

From the point of view of the user, the black box test is carried out from the corresponding relationship between the input data and the output data. Obviously, if there is a problem with the design of the external feature itself or if the specification is incorrect, it cannot be found by using the black box test method.

Figure 3: menu

According to the analysis of the function sheet, it can be concluded that the digital circuit shown in figure 2 completes the function of two inputs and gates. Must there be a two-input gate in this circuit? The answer is: not necessarily.

Figure 5: OR gates made up of three and non-doors

Figure 7: schematic diagram of selecting a multiplexer from two

When Signor0, Yanzais; when Signor1, YroomB. List the truth table according to the known functions (figure 2-8).

Figure 9: memory model

The memory is divided into many "small cells", each of which can hold a lot of binary numbers. Each grid has its own unique logo, just like our house number, each house is different. The logical function is that when a "house number" is entered externally, the binary number in the corresponding "small grid" will be output.

The number of "small squares" in the memory is determined at the time of manufacturing. when the number of "small squares" is determined, then the situation of the "house number" is also determined. Ex.: we have 100 rooms, and we only have two decimal numbers, 00 to 99. In memory, the "house number" can only be represented by binary numbers, for example, if there are four "small squares", then the "house number" should be represented by two binary codes, 0011. The number of binary numbers stored in each "small grid" is determined at the time of manufacture.

Usually we call "house number" as address, "small cell" as the storage space of a single address, and the number of binary digits that each "small cell" can put down is called "memory bit width".

Make a memory with 8 addresses and a single address space of 1 binary number. At this point, the address code should have three digits, and the number of binary digits stored in each address is 1. Requirements: 000 address, put into 0position 001 address, put into 0position 010 address, put into 1position 011 address, put into 1position 100 address, put into 0position 101 address, put into 1position 110 address, put into 0position 111 address, put into 1

Figure 11: memory function sheet

Comparing figure 11 of the function sheet of the memory with figure 8 of the truth table of selecting a multiplexer from the two, we will find that the logic function is the same except for the different custom signal names. That is to say, when designing a black box, we can put a memory with a preset value in it, and its external function can also be used to choose a multiplexer from two. At this point, the memory with the preset value can be equivalent to choosing a multiplexer from two.

After careful observation, we find that any truth table can be equivalent by memory. That is to say, a memory circuit can be equivalent to an arbitrary combinational logic circuit.

The advantage of memory circuit: it does not need to do any logic simplification, is not limited by the style of the basic logic gate circuit, and the final circuit function can be obtained quickly. If the memory can modify the preset value arbitrarily, then the same memory can be equivalent to all kinds of circuits with different preset values. If it is a basic gate circuit, it needs to be limited by quantity and style.

Disadvantages of memory circuits: for simple gate circuits, it is a waste to implement them with memory. Memory circuit is also a relatively complex circuit. In addition, the delay of the memory circuit is generally on the large side, for the same reason as above.

In the design of digital combinational logic circuit, if the design mode of gate circuit is adopted, when the circuit function needs to be updated, it is necessary to rearrange the circuit structure and replace the basic circuit components; if the memory equivalent design method is adopted, just change the preset value. This method provides a good solution for us to upgrade the circuit.

FPGA (Field-Programmable Gate Array), that is, field programmable gate array, is the product of further development on the basis of programmable devices such as PAL, GAL, CPLD and so on. It appears as a kind of semi-custom circuit in the field of application specific integrated circuit (ASIC). It not only solves the deficiency of custom circuit, but also overcomes the disadvantage of the limited number of gate circuits of the original programmable device.

Before introducing the structure of FPGA chip, we first make a simple comparison between FPGA and single-chip microcomputer.

Single-chip microcomputer is a kind of microprocessor, which is similar to computer CPU. Its circuit is fixed, and it uses software programming language to describe software instructions to control the microprocessor to work; all its instructions are executed sequentially by the microprocessor.

Figure 13: schematic diagram of logic function of and gate

It is required to realize the and operation of two signals and output the results as one signal. So how do you achieve this function in both single-chip microcomputer and FPGA?

In the single-chip microcomputer, it is assumed that we have assigned the corresponding variables and pins. We will write the following code:

Figure 14: schematic diagram of CYCLONE IV E programmable minimum unit

CYCLONE IV E is the fourth generation of the CYCLONE series in INTEL FPGA. In the figure above, the four-input lookup table (Four-Input LUT) is actually a memory with 16 storage space, each with only one binary number, and LUT (Look Up Table) is the lookup table. By setting a reasonable preset value, certain functions of digital combinational logic circuits can be realized.

So why fix it to 16 memory space? If we are going to implement a 5-input and gate, then 16 storage space will not be enough. So what should we do now?

In fact, it is also very simple, just divide the 5-input and gate into a four-input and gate, and then compare the result with another input. The same can be done for memory circuits.

If it can be cascaded, then it is also possible to make 2 inputs. In principle, yes, but if the logic we implement is more complex, then the cascade will be very long, and the delay will be very large. If it is made into 1000 input, is it good? no matter how complicated it is, there is no need for cascading. But in the design, what we do is not only complex logic, but also a lot of uncomplex, so a two-input and gate design also takes up a 1000 input, then the loss outweighs the gain. So after measurement, the designer finally made the input into a 4-input lookup table.

After continuous development, the application of FPGA in various occasions is more and more, the design is more and more complex, and the required delay is getting smaller and smaller. So the new FPGA series has more input lookup tables.

In figure 2-14, there is a sequential logic device behind it. This sequential logic device is directly implemented inside the FPGA by FPGA manufacturers. When we design the circuit, we don't need to design it, we just need to call it out.

As a result, we can implement a small part of combinational logic and temporal logic. But complex designs often require cascading.

Figure 16: IO unit of CYCLONE IV

In the IO unit, we can find that the whole IO unit can be configured as input, output, input and output. And whether it can be configured with pull-up resistor, as well as circuit delay and other functions.

FPGA has a large number of IO, so when you need to control multiple peripherals at the same time, there is no need for cascading, so the consistency will be better.

Figure 17: IO powered bank of a piece of FPGA in CYCLONE IV E

In FPGA, the internal logic operation is a voltage. The input and output are divided into many blocks (bank), each of which can have its own level standard, which allows the FPGA to drive multiple interfaces of different voltage standards without a conversion circuit.

You can see in figure 17 that the internal logic voltage of the FPGA is relatively low, so the power consumption of the FPGA is also relatively low.

Through the above three structures, a simple FPGA chip can be implemented.

In the application of FPGA, we find that some buffers and special circuits are often used, and the requirements for these circuits are relatively high, so it is not realistic to implement them with FPGA. Then FPGA will integrate it into the FPGA and use a large number of interconnected resources to draw out the interface and provide internal logic for control or communication.

Designers can use the resources of FPGA to realize the function of CPU and form SOPC.

Nowadays, many FPGA put the hard core of ARM into their own interior to form SOC.

This article is only a brief introduction to the internal structure of FPGA. Later, when you need to understand the structure in detail, you will list it separately and explain it in detail. Students who are interested can check the introduction document of FPGA by themselves.

FPGA is a kind of chip, which is produced and sold by many manufacturers. Here is a brief introduction to several manufacturers and their chips.

Since the invention of the world's first programmable logic device 20 years ago, Intel FPGA Altera (Altra) has inherited the tradition of innovation and is the world's advocate of programmable chip system (SOPC) solutions. Altera combines programmable logic technology with software tools, intellectual property (IP) and technical services to provide high-quality programmable solutions to more than 14000 customers worldwide. Our new product line combines the inherent advantages of programmable logic-flexibility, product availability-with more advanced performance and integration, and is designed to meet today's wide range of system requirements.

In December 2015, Intel bought Altera for $16.7 billion. At this point, we renamed Altera FPGA to Intel FPGA.

The mainstream FPGA of Intel FPGA is divided into two categories, one focuses on low-cost applications with medium capacity, and its performance can meet general logical design requirements, such as Cyclone series; the other focuses on high-performance applications with large capacity, and its performance can meet all kinds of high-end applications, such as Startix, Arria series, etc., users can choose according to their actual application requirements. Under the condition that the performance can be satisfied, low-cost devices are preferred.

Xilinx FPGA Xilinx is the world's leading provider of complete solutions for programmable logic. Xilinx develops, manufactures and sells a wide range of advanced integrated circuits, software design tools, and IP (Intellectual Property) cores as predefined system-level functions. Customers use the automation software tools of Xilinx and its partners and IP checking devices for programming to complete specific logic operations.

The mainstream FPGA of Xilinx is divided into two categories, one focuses on low-cost applications with medium capacity, and its performance can meet general logical design requirements, such as Spartan series; the other focuses on high-performance applications with large capacity and performance to meet all kinds of high-end applications, such as Virtex series, users can choose according to their actual application requirements. Under the condition that the performance can be satisfied, low-cost devices are preferred.

After Xilinx officially announced to the outside world that it launched the world's first 28nm process Kintex-7, the company launched seven series of four chips: Artix-7, Kintex-7, Virtex-7 and Zynq FPGA chips, as well as development resources around the seven series.

Actel FPGA ACTEL was founded in 1985 and is located in New York, USA. For more than 20 years, ACTEL has worked in the US military and aviation industries and banned foreign sales. Domestic enterprises in some special fields use other ways to buy military-grade models. At present, ACTEL is gradually turning to civil and commercial use. In addition to the anti-fuse series, it also launches the repeatable erasable ProASIC3 series (for automotive, industrial control, military aviation industry).

Lattice FPGA Ledith (Lattice) Semiconductor provides the industry's broadest range of field programmable gate arrays (FPGA), programmable logic devices (PLD) and related software, including field programmable system chips (FPSC), complex programmable logic devices (CPLD), programmable mixed signal products (ispPAC ®) and programmable digital interconnect devices (ispGDX ®).

Domestic FPGA Jingwei Qili, Xi'an Zhi polycrystal microelectronics, Ziguang Guowei, Gao Yun and so on, they all have their own FPGA series chips.

There are many FPGA vendors, but the basic internal structure and development process are relatively close. As long as you master one way of FPGA development, other FPGA development will be much easier to use.

At present, most of them use INTEL FPGA and Xilinx FPGA to learn FPGA design, and the FPGA chips of these two companies are also the most widely used.

The system designer can connect the logic blocks inside the FPGA through editable connections as needed, as if a circuit test board was placed in a chip. The logic blocks and connections of a factory finished FPGA can be changed according to the designer, so the FPGA can perform the required logic functions.

The characteristics of FPGA are as follows:

Using FPGA to design ASIC circuit (application specific integrated circuit), users can get suitable chips without putting into production.

FPGA can be used as a pilot sample of other full-custom or semi-custom ASIC circuits.

FPGA has a wealth of triggers and Imax O pins inside.

FPGA is one of the devices with the shortest design cycle, lowest development cost and lowest risk in ASIC circuits.

FPGA uses high-speed CMOS process, low power consumption, and is compatible with CMOS and TTL levels.

It can be said that FPGA chip is one of the best choices for small batch systems to improve system integration and reliability.

The applications of FPGA can be divided into the following categories:

In the field of data acquisition: most of the signals in nature are analog signals. When collecting at high speed, the information can not be directly transferred to MCU or DSP. At this point, FPGA is required for a certain amount of conversion and rate matching.

Logical interface field: when CPU is communicating with the outside world, it needs a variety of special interfaces, and the interface circuit introduced by the interface circuit is very large. After joining FPGA, CPU can communicate with FPGA separately, and FPGA can extend other interfaces.

Level interface field: different devices support different levels, if you need to connect a variety of interfaces, you need a variety of interface standards or conversion circuits. For FPGA, FPGA is divided into different BANK, which can directly support different level standards.

In the field of digital signal processing: communication, image and other fields have put forward higher requirements for computing in recent years. FPGA supports parallel computing, which can greatly shorten the computing time.

IC design field: when designing, IC will first use FPGA to design the basic circuit model for a variety of theoretical verification, and so on, after the verification will be carried out IC manufacturing and so on.

Through the above description, we know that FPGA uses equivalent circuits to achieve functions, so its speed can not catch up with ASIC?

Since we want to make a comparison, it is necessary to explain part of the situation. Ex.: under the same technological conditions, FPGA does not run as fast as ASIC. The major FPGA manufacturers all use the world's advanced technology to make films, if some application types of companies try to use the most advanced technology to make films, then the risk is higher and the cost is more expensive. If you use mature technology to make films, then the speed of asic will not necessarily be as fast as FPGA.

On the basis of FPGA what the FPGA chip is shared here, I hope the above content can be of some help to you, can learn more knowledge. If you think the article is good, you can share it for more people to see.

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