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This article introduces you how to set i.MX6 DDR parameters, the content is very detailed, interested friends can refer to, hope to be helpful to you.

DDR Stress Test Tool provides two uses. First of all, it can be used to calibrate DDR3, so that MMDC PHY delay settings and PCB can be paired to achieve the best new energy of DRAM. The whole process is fully automated, so customers can get their DDR3 working in a relatively short period of time. In addition, the tool can run memory stress tests to verify the functionality and reliability of DDR3. Stress tests can be used to verify hardware connections, MMDC register parameters, and DDR3 mode register settings. The most important purpose of the test is to allow customers to verify that DDR3 runs smoothly on their own boards. Calibration on the i.MX6 processor, DDR3 requires four calibration procedures, which fine-tune the MMDC PHY waiting for register correction to type the DDR3 configuration in DDR Stress Test Tool. First of all, the calibration test will indicate the DRAM frequency. The default values for i.MX6Q and i.MX6D are 528MHz. MX6DL, and the default values for i.MX6S and i.MX6SL are 400MHz. This is the DRAM frequency used by BSP. Press'y'to continue with the correction process. Typing'n 'here will have an option to select a specific frequency. It is only used for debugging. When the DRAM frequency selection is over, the tool will begin to correct. Write Leveling Calibration this is the first correction, which is used to fine-tune the delay between DRAM clock and write DQS output from i.MX6 processor and press'y'to continue the correction process. If the board has been corrected and the correction result has been incorporated into the script, press'n'to skip the correction. After pressing'y'to start the correction, you need to enter the value of DDR3 Mode Register MR1, which can be found in the following lines of the initialization script. The value is the two most significant bytes after the equal sign, i.e. 0x0004 on this example. Setmem / 32 0x021b001c = 0x00048031 / / MMDC0_MDSCR, MR1 write, CS0 The value must be the same as in the DDR initialization script. Otherwise, the following test results will be invalid because The Value is the value used to restore DDR3's MR1 when exiting write leveling mode. The second correction process of Read DQS Gating Calibration is DQS gating calibration. It is used to fine-tune the read DQS gating so that it can accurately capture the read DQS signal. The correction program adjusts the DQS gating delay to find a valid DQS delay window in the 4amp 256 always cycle. The intermediate operation is similar to that of press' yawn'. Calibration Results is no longer translated.

After finishing all the calibration process, the calibration results are summarized and as shown below. The tool will proceed to run the DRAM stress test with the delay registers updated with these calibration results.

However, it is very important that these results should be recorded down and the DRAM initialization script should be updated accordingly. When porting the MMDC parameters to the firmware, the delay registers must be programmed

According to the updated script. Otherwise, the DDR3 may not be able to run stably on the firmware.

In general, the operation process is as follows:

Use the Aid tool (Excel) provided by Freescale to generate .inc files according to the material selection and design of your own board. This part of Freescale will help you, and you only need to provide the design materials to AE.

Use DDR Stress Test Tool to correct the generated parameters on your own board

Revise your .inc file and conduct a stress test according to the test results

Add data from the inc file to the flash_header.s of u-boot.

On how to set i.MX6 DDR parameters to share here, I hope that the above content can be of some help to you, can learn more knowledge. If you think the article is good, you can share it for more people to see.

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