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This article mainly shows you "how to use Makefile under Linux", the content is easy to understand, clear, hope to help you solve your doubts, the following let the editor lead you to study and learn "how to use Makefile under Linux" this article.

Makefile

There may be many source files in a project file, and different functions, modules and so on are placed in different directories, conventional compilation can not efficiently deal with this problem, and Makefile is to solve this problem.

Once Makefile is written, only one make instruction is needed to complete all the instructions written in the Makefile file, thus compiling the whole project file, which greatly improves the efficiency.

Make is a command tool that interprets commands in Makefile.

Makefile file naming and rules

File naming

Either makefile or Makefile can be used.

Makefile rule

The command rules in Makefile are as follows:

Xxx (target file): xxx (dependent file)

(tabs) command (shell command)

Among them, the target file is the final file to be generated (except the pseudo-target), and the dependent file is the file needed to generate the target file, and the command is the shell command.

Note that there must be an tab indent before the command.

For example:

# Makefileapp: A.C b.c # goal: depend on gcc a.c b.c-o app # notice the indentation at the beginning of this line

After make above this Makefile, A.C and b.c in the directory will be compiled into the target file app.

How Makefile works

Commands in Makefile check for the existence of required dependent files before they are executed

If there is: execute the command

If it does not exist: check down other rules for dependencies needed by other rules to generate the current rule, and if so, execute the commands in that rule.

For example:

# Makefileapp: a.ob.o gcc a.ob.o-o appa.o: A.C gcc-c a.c-o a.ob.o: B.C gcc-c b.c-ob.o

In the above Makefile, when you execute the app rule, you will find that the required dependency files a.o and b.o do not exist in the current directory, so you will look down to see if any other rules generate this file, and when you find the a.o rule, you will find that it is the required file, and execute gcc-c a.c-o a.o.b.

When Makefile executes the command in the rule, it compares the modification time of the target file and the dependent file

If the dependent file is later than the target file modification time, that is, the dependent file has been modified since the last build target, the target file is regenerated.

If the dependent file is earlier than the target file modification time, that is, the dependent file has not been modified since the last build target, the corresponding command will not be executed.

For example, if you use make on a Makefile twice, the second time you will prompt make: "app" is up to date.

Taking advantage of this feature, plus we will generate dependency and target hierarchically, that is, the second Makefile above, so that when we only modify the A.C file, once again make will only execute A.O rules and app rules, and b.o rules will not be implemented because B.C has not been modified, which can greatly reduce the waste of resources.

Makefile variable

Although the above can reduce the repetition of compiled code, if there are 1000 .c. H files in a project, we will waste a lot of time writing a Makefile. Therefore, we should use some variables to improve efficiency.

Acquisition of variables

We use $(variable name) to use variables.

Custom variable

We use the variable name = variable value such as var = hello to define the variable we need.

For example, the first Makefile above can be rewritten as:

# Makefilersc = a.c b.capp: $(rsc) # Target: depend on gcc $(rsc)-o app # Note the indentation at the beginning of this line

Predefined variable

Some of the variables are predefined by the system and we can use them directly.

AR: name of the archive maintenance program, default is ar

The name of the CC:C compiler. The default is cc.

The name of the CXX:C++ compiler. The default value is Gmail +.

$@: full name of the target

$

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