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This article mainly explains the "what are the matters needing attention in the use of the header file under the Vivado". The content in the article is simple and clear, and it is easy to learn and understand. Please follow the editor's train of thought to study and learn "what are the precautions for the use of the header file under Vivado".

Is not limited to Vivado, a kind of EDA.

Header files mainly use "file include" processing, the so-called "file include" processing is a source file can include the entire contents of another source file, that is, another file is included in this file. The Verilog language provides the `include command to implement the operation of "file inclusion".

I defined a global variable in the header file as follows:

When I use this global variable, I always prompt that the global variable cannot be found:

There are two main reasons for this problem:

1. The type of header file should be noted:

The type can be modified in the arrow part.

2. Quote error:

Output reg [WIDTH-1:0] LED

The above is wrong, and the correct is as follows:

Output reg ['WIDTH-1:0] LED

The first of these is less likely to cause errors, and it won't be a problem to try other types (Verilog source file types).

Note the following points about the use of file inclusions:

Thank you for your reading, these are the contents of "what are the matters needing attention in the use of Vivado header files". After the study of this article, I believe you have a deeper understanding of what matters needing attention in the use of Vivado header files, and the specific use needs to be verified in practice. Here is, the editor will push for you more related knowledge points of the article, welcome to follow!

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