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This article introduces the relevant knowledge of "what are the characteristics of Harvard structure or von Neumann structure". In the operation of actual cases, many people will encounter such a dilemma. Next, let the editor lead you to learn how to deal with these situations. I hope you can read it carefully and be able to achieve something!

Modern CPU is basically classified as von Neumann structure (also known as Princeton structure) and Harvard structure.

The von Loyman architecture is what we call the X86 architecture, and the Harvard architecture is the ARM architecture. One is widely used on the desktop side (desktop / laptop / server / workstation, etc.), a dominant mobile field, our handheld devices (he is mostly used on tablet / mobile phones).

01 von Neumann system

The Von Neumann architecture diagram is as follows

The characteristics of the von Neumann system:

A, data and instructions are stored in the same storage area, fetching instructions and fetching data use the same data bus.

B. it was adopted by most computers in the early days.

C, ARM7-- von Neumann architecture is simple, but slow. Fetch fingers cannot fetch data at the same time

Von Neumann structure, also known as Princeton structure, is a memory structure that combines program instruction memory and data memory. The program instruction storage address and data storage address point to different physical locations of the same memory, so the width of program instructions and data is the same, such as Intel's 8086 CPU, both program instructions and data are 16 bits wide.

Feng. The Neumann architecture processor has the following characteristics:

1: there must be a memory

2: there must be a controller; 3: there must be an arithmetic unit for arithmetic and logic operations; 4: there must be input and output devices for man-machine communication. In addition, the program and data are stored together and work automatically under the control of the program. Von Neumann structure:

Intel's 8086. Intel's other CPUs. ARM7 for ARM. MIPS's MIPS processor.

02 Harvard system

Harvard architecture diagram

Structural features:

A. the program memory is separated from the data memory.

B. It provides a large memory bandwidth and each has its own bus.

C, suitable for digital signal processing.

D. most of the DSP are Harvard structures.

E, ARM9 is the Harvard structure, fetch and fetch in the same cycle, improve the speed, improve the Harvard architecture is divided into three storage areas: program, data, program and data sharing.

Harvard architecture is a kind of memory parallel architecture, which is mainly characterized by storing programs and data in different storage spaces, that is, program memory and data memory are two independent memories, each memory is addressed and accessed independently. The separation of program instruction storage and data storage can make instructions and data have different data widths.

Harvard structure can basically solve the conflict between reference and number. The access to another Operand can only use the Enhanced Harvard structure, such as TI, the data area is split, and there is an additional set of buses. Or like AD, using the instruction cache, the instruction area can store part of the data.

Harvard structure:

1. ARM (except arm7)

2. Most DSP

Harvard architecture has a fatal weakness in dynamic loading programs. Imagine that we read a program from external memory and load it into RAM, which is in data memory. We need a mechanism to transfer data memory to program memory, which increases the complexity of the device.

For a multitasking operating system, managing program memory is a very important thing, and only the mechanism of page mapping in protected mode is complex enough, if it is also required to manage the program and data separately, the complexity is too high. At this time, the von Neumann architecture has a great advantage.

The relationship between 03arm and Harvard and Von Neumann

Harvard architecture is aimed at cpu fetching instructions from cache. Instructions and data are not separated in main memory, but when loaded into cache, they are separated into two storage spaces: instructions and data. Cpu can fetch instructions and data from cache at the same time.

Therefore, arm system CPU (except arm7) is externally represented as Feng. The Neumann architecture is represented internally as the Harvard architecture.

04 actual chip manufacturing

In fact, most modern computers use the so-called "ModifiedHarvard Architecture", where instructions and data share the same address space, but the cache is separate. It can be said to be a compromise between the two architectures.

There are few very pure concepts in the real world, especially in practical applications. Most of the models in textbooks are idealized, so it is easy to grasp the focus and essence of a concept, but it is difficult to achieve this idealized state in practice.

The main difference between Harvard structure and von Neumann structure is whether to distinguish between instructions and data. These are two completely different approaches in textbooks.

But in fact, in memory, instructions and data are together. In the cache within CPU, there is still a distinction between instruction caching and data caching, and when finally executed, instructions and data come from two different places. You can understand that outside the CPU, the von Neumann model is used, while inside the CPU, the Harvard structure is used.

Most of the DSP is not cached, so it is directly Harvard structure.

Harvard's structural design is complex, but it is efficient. Von Neumann structure is relatively simple, but also relatively slow. In order to improve the processing speed, CPU manufacturers have added cache in CPU. For the same purpose, the distinction between instruction cache and data cache is made. Sometimes in order to solve practical problems, what kind of doctrine is really not that important. Therefore, I personally think that it is of little significance to debate which kind of structure it is.

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