Shulou(Shulou.com)06/01 Report--

Last weekend, I attended Donggua's training course on the underlying principles of storage and server architecture, and regained some of the knowledge of storage and server. Personal comments do not represent the views of Donggua and his company.

From the point of view of the implementation of the underlying principle, the physical hardware nature of storage and server are three major components: the combined use of CPU, memory and Icano.

The mainstream trend of one and three major pieces

In the aspect of CPU chip, CPU chip is the embodiment of high-tech hard power from process design to process manufacturing, while our country has been investing a lot of money in technology research and development, biosphere construction and technology catch-up. At present, China is in the same starting line with the international in the process design of AI chip, which mainly depends on the technology of domestic Cambrian and other companies, while in the field of traditional CPU chip and GPU chip, whether in chip design or in process, it lags behind at least 2 to 3 generations of international technology. In terms of chip design, Hu Weiwu's dragon son has finally come out for many years. I still remember that when I was at school, Hu Weiwu's Godson Research Institute settled in Jiangjin, Chongqing, and our school temporarily lent a classroom to Hu Weiwu's temporary Loongxin Research Institute. At that time, the Godson project was rich, which was sought after by all the governments. In the end, Chongqing Jiangjin was won. Of course, the main internal reason was that Hu Weiwu's mentor at that time, Mr. Xia Peisu, the founder of China's computer industry, was from Jiangjin, Chongqing. Back to the truth, in the field of CPU chip process, its manufacturing technology semiconductor industry started late in China, with a weak foundation, and there is also a lack of relevant leaders and technical scientists, such as a general like Zhang Zhongmou in Taiwan. At present, SMIC, the main leading enterprise in China, is still in mass production with low yield of 28nm, and the fully mature specification technology of 40nm process is carrying on technical exploration. According to the technical echelon, the first echelon: TSMC, Samsung, Intel, have mastered the high-end production technology of 7nm and 10nm, and studied and designed the process of 5nm in the laboratory; the second echelon, Global Foundries, UMC, etc., have small-scale mass production in high-end 10nm and 14nm, and the 28nm process is completely mature; SMIC can only be regarded as a member of the third echelon.

In terms of memory, there are only a few companies that can really be called memory manufacturers. Memory manufacturers design, produce, and test components and modules at all stages of production. The memory module consists of two chips: a DRAM semiconductor chip that stores data and a printed circuit board (PCB) that connects the memory chip to the rest of the computer. The semiconductor manufacturers capable of producing DRAM chips are Micron Micron, Samsung, Hynix and Toshiba, which account for 95 per cent of the market. In terms of memory industry, China has been acting frequently, among which the typical representative is Ziguang Company, which has the support of national policy and funds. through acquisition and technical cooperation, Ziguang Company can finally launch mainstream memory products on the market. however, due to the backward production technology, the rate of quality products is very low, can not control the market in quantity. And the new memory technology HBM has appeared, currently in circulation is mainly HBM 2 Fury series graphics cards released in 2015, the first commercial HBM technology for the first time, ultra-high bandwidth and very low footprint completely changed the graphics card design at that time, and then NVIDIA also adopted HBM 2 technology on the Tesla P100. Compared with the current DDR memory technology, the core capacity of HBM2 memory on the market can reach 8Gb. Through TSV technology, each CPU can support 64GB HBM2 memory, and the bandwidth of each slot can reach 2TB/s. In the era of HBM 4, each CPU can support up to 512GB, with a bandwidth exceeding 8TB/s. However, when the current CPU processor supports 8-channel DDR4 memory, the maximum capacity can reach 2TB, and the bandwidth is only 150GB/s, which is significantly different from the HBM memory.

Unlike CPU and memory, there is no monopoly company in iUniver. The main reason is that there are so many modules and types that no one company can completely produce, design and manufacture. It is necessary to design a universal and open standard, and all manufacturers produce and adapt products according to the standard. Only in this way can different Icano devices be integrated and combined.

The interaction between the server and storage is mainly through the network Imax O and the storage Imax O. There is no doubt that Ethernet reigns over the world. At present, 10GB is already a standard and mass production scale, 40GB is also in small-scale trial, and 100GB is also in the experimental stage. On the other hand, there are many kinds of specifications and standards in the storage of NVMe O, so it focuses on the popular and mainstream specifications such as NVMe, PCIe and SAS.

NVMe (Non-Volatile Memory express), which is called non-volatile memory host controller interface specification, is a logical device interface specification. To put it simply, NVMe is a protocol specially designed for flash storage, because the processing speed of flash storage is much faster than that of traditional protocols, so flash storage needs new protocols to support high-speed storage processing. The application of NVMe in servers and storage devices can be divided into two types: the back-end and the front-end. The back-end NVMe application replaces the SAS protocol as the SSD or Flash storage connection controller protocol, while the front-end NVMe application grafts NVMe onto the existing network transmission channel to form an external NVMe-oF transmission architecture. The back-end application of NVMe has entered a mature stage. At present, all the major SSD hard drives in the market support NVMe protocol and have been used in batches. As long as our computer motherboard is integrated with PCIe slots, we can access NVMe protocol SSD hard drives or Flash media. However, the NVMe-oF architecture of front-end applications is still being promoted and tested. And because of the wide variety of front-end protocols, NVMe has adapted and tested them, so which grafting method can occupy the mainstream has not been decided. Because many forms of NVMe, such as 32Gb FC-based, InfiniBand-based, 25/50GbE RoCE-based or iWARP Ethernet, have their own advantages and disadvantages and application scenarios.

Let's take a detailed look at the mature application of NVMe on the server and storage devices on the back end. It is mainly divided into NVMe SSD based on PCIe interface and NVMe back-end protocol based on PCIe interface.

NVMe SSD based on PCIe Interface

NVMe is an interface specification or protocol, SSD hard disk or Flash media communicate with the controller through this protocol, because SSD hard disk or Flash media and communication protocols become more efficient, and the use of traditional SATA interface is no longer adapted to the needs of rapid growth, so the interface also needs to be changed accordingly, this change is PCIe.

Now the slots on the motherboard are basically PCI slots or PCIe slots. PCI slot is the most widely used interface in personal computer, and almost all motherboard products have this kind of slot. With PCI, computers can get almost all the external functions that computers can achieve by plugging in different expansion cards. The full name of PCIe is "PCI-Express", which is based on the updated and upgraded version of PCI. It is the latest bus and interface standard. Its original name is "3GIO", which was put forward by Intel in 2000. Finally, it is standardized and promoted by PCI Standardization Organization.

At present, the PCIe slots integrated on the server are all PCIe3.0 specifications, but one problem is that the motherboard area and space of the server are limited, and the number of PCIe that can be integrated is also limited. When all the hard drives of the server use NVMe SSD and use the PCIe channel as the transmission medium, the PCIe transmission channel of the server motherboard is not enough. For example, a NVMe SSD takes up 4 PCIe 3.0s, and a standard 2U server with 24 NVMe SSD takes up as many as 96 PCIe transmission channels. Therefore, in order to solve the problem of shortage of PCIe resources on the server motherboard, the PCIe Standardization Organization issued PCIe 4.0. the single channel transmission rate of PCIe 4.0is twice as high as that of PCIe 3.0.This is because one piece of NVMe SSD occupies four PCIe 3.0channels in order to obtain sufficient transmission bandwidth. therefore, increasing the transmission bandwidth of PCIe single channel can reduce the occupation of PCIe channels by NVMe SSD. A NVMe SSD only needs to occupy two PCIe channel interfaces to meet the transmission bandwidth requirements. Based on this, the PCIe Standardization Organization issued a notice showing that PCIe 5.0will continue to be launched, which can double the transmission rate of a single channel on the basis of PCIe 4.0. That is, the transmission rate of single channel under PCIe 5.0specification is 4 times higher than that under PCIe 3.0specification. A NVMe SSD only needs to occupy one PCIe 5.0channel interface to meet the transmission bandwidth requirements.

NVMe back-end Protocol based on PCIe Interface

In the storage system, the connection between the controller and the back-end storage hard disk cabinet adopts the mainstream SAS-3 specification, that is, the SAS interface and protocol with 12Gb SAS technology standard. SAS is one of the most important enterprise storage specifications, and it is also the standard specification of SSD and external hard disk cabinets. In the storage system, SAS has long unified the back-end storage specifications of all storage devices for too long. SAS is a kind of protocol and an interface, strictly speaking, it is SAS protocol and SAS interface, but because they are both called SAS, SAS is used as a reference.

Because the hard disk media uses SSD, so if the original SAS is used to connect the Icano transmission between the controller and the hard disk cabinet, which is similar to the directly connected host end, the transmission channel will not be able to meet the needs of SSD. So someone is trying to replace SAS with PCIe-based NVMe, and substantial progress has been made, so it is possible that SAS will be replaced by PCIe-based NVMe.

The drafting and development of SAS standard lags behind slightly. SAS-3 has been available for many years, but SAS-4 has been in the stage of dystocia. Now SAS-4 is still in the stage of controller components and has not actually entered the application of storage products. While NVMe based on PCIe has been actually used in storage products, we can imagine the speed and response of SAS. Although the transmission bandwidth of SAS-4 is twice that of SAS-3. A single channel can reach 24Gb/s, and four channels can reach 96Gb/s. But NVMe is not much worse than SAS-4, and SAS has inherent delay defects. I'm afraid the launch of SAS-4 is out of date.

Generally speaking, the gap between domestic and international lies in the application and research and development of products and modules, which is a general technical standard and specification based on the technology of Ihammer O specification. For example, the current domestic mechanical hard disk can not be realized independently, in the era of SSD hard disk, because SSD is based on flash memory particles, so in terms of technical difficulty, China can achieve and also launch independent SSD products, but there is still a certain gap in the formulation and participation of SSD O specifications. It is often said in the market that first-class enterprises make standards, second-class enterprises do brands, and third-class enterprises make products. Chinese enterprises also have to participate in the formulation of the rules of the game if they want to have a place in the future competition.

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