Shulou(Shulou.com)06/03 Report--

(1) introduction to the architecture

We all know that the fundamental task of CPU is to execute instructions, which is ultimately a sequence of "0" and "1" for computers. CPU can be logically divided into three modules, namely, control unit, operation unit and memory unit, which are connected by the internal bus of CPU. As follows:

Control unit: the control unit is the command and control center of the whole CPU, which consists of instruction register IR (InstructionRegister), instruction decoder ID (InstructionDecoder) and operation controller OC (OperationController), which is very important to coordinate the orderly work of the whole computer. According to the pre-programmed program of the user, it takes out each instruction from the memory in turn, puts it in the instruction register IR, determines what operation should be carried out through instruction decoding (analysis), and then sends micromanipulation control signals to the corresponding components through the operation controller OC. The operation controller OC mainly includes control logic such as beat pulse generator, control matrix, clock pulse generator, reset circuit and start-stop circuit.

Operation unit: is the core of the arithmetic unit. You can perform arithmetic operations (including basic operations such as addition and subtraction multipliers and their additional operations) and logical operations (including shifts, logical tests, or comparison of two values). Compared with the control unit, the arithmetic unit accepts the command of the control unit and carries out the action, that is, all the operations of the operation unit are directed by the control signal sent by the control unit, so it is the execution unit.

Storage unit: including CPU on-chip cache and register group, is the temporary storage of data in CPU, which stores the data waiting to be processed, or the data that has been processed. The time it takes for CPU to access the register is shorter than the time to access memory. The use of registers can reduce the number of times CPU accesses memory, thus improving the working speed of CPU. However, due to the limitation of chip area and integration, the capacity of register bank can not be very large. Register groups can be divided into special registers and general registers. The function of the special register is fixed, registering the corresponding data respectively. General-purpose registers have a wide range of uses and can be specified by programmers. The number of general-purpose registers varies from microprocessor to microprocessor. This is the key point that we will introduce in the future. Let's first mention it here.

If we refine the above figure, we can see that how CPU works is summarized as follows:

Generally speaking, CPU fetches instructions and corresponding data one by one from memory and processes the data according to the instruction opcode until the program is executed.

I didn't draw the bus in the above picture, but presented it logically. The reason is that early Intel microprocessors, such as 8085 focus 8086 master 8088 CPU, generally use address bus and data bus multiplexing technology, that is, some (or all) address bus and data bus share some pins of CPU. For example, there are 20 external address buses in 8086, and the data bus reuses the first 16 pins of the address bus. Although the multiplexed data bus and address bus can reduce the number of pins of CPU, it introduces the complexity of control logic and operation sequence. Therefore, since 80286, Intel's CPU has adopted a separate address bus and data bus.

Whether it is reuse or separation, it has no effect on our understanding of the operation principle of CPU. The purpose of not drawing a bus in the above picture is for fear that some people will pursue details too much and will not float, and cannot despise the enemy macroscopically.

OK, to sum up, the operation principle of CPU is: under the action of timing pulse, the control unit sends the instruction address pointed to in the instruction counter (this address is in memory) to the address bus, and then CPU reads the instructions in this address to the instruction register for decoding. For the data needed in the execution of the instruction, the address of the data is also sent to the address bus, and then the CPU reads the data to the internal storage unit of the CPU (that is, the internal register) for temporary storage, and finally commands the operation unit to process the data. Go on and on and on.

1. Fetch instruction: the controller of CPU reads an instruction from memory and puts it into the instruction register. The format of an instruction usually looks like this:

The opcode is the mov,add,jmp and other symbol numbers in assembly language; the Operand address indicates whether the Operand required by the instruction is in memory or in the internal register of CPU.

2. Instruction decoding: the instruction in the instruction register is decoded to determine what operation the instruction should do (that is, the opcode in the instruction) and where the Operand is (the address of the Operand).

3. Execute the instruction and "take the Operand" and "perform the operation" in two stages.

4. Modify the instruction counter to determine the address of the next instruction.

(2) introduction of relevant parameters

1. Main frequency

The main frequency is the clock frequency, which represents the speed at which the digital pulse signal oscillates in the cpu. Main frequency = external frequency * frequency doubling. GHz,1GHz means 1 billion concussions per second.

2. External frequency

External frequency is the reference frequency of cpu, which is the speed at which cpu runs synchronously with the outside world (motherboard, memory).

3. Front segment bus frequency

What we want to express is the data transmission rate, not the frequency. The calculation formula is bit width (64) * external frequency / 8 (Byte) = MB/s

4. Frequency doubling

The frequency doubling coefficient means that the main frequency is a multiple of the external frequency.

5. Working voltage of cpu kernel and Istroke O

Generally speaking, the smaller the manufacturing process is, the lower the working voltage of the core is; the voltage of Imax O is generally 1.6 ~ 3V, and the low voltage can solve the problems of high power consumption and high heating.

6. Manufacturing process

It refers to the width of the connecting line of the internal equipment when producing cpu on silicon material, usually expressed in nanometers.

7. Pipeline and super pipelining

In cpu, an instruction processing pipeline is composed of 5-6 circuit units with different functions, and then an instruction is divided into 5-6 steps and then executed by these circuit units respectively, so as to improve the operation speed of cpu. An assembly line that exceeds the usual number is called a super pipeline.

Reference article: http://blog.chinaunix.net/uid-23069658-id-3563960.html

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