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This article will explain in detail how to configure the Linux kernel of Devyn. The content of the article is of high quality, so the editor shares it for you as a reference. I hope you will have some understanding of the relevant knowledge after reading this article.

Here we are asked about "IBM Calgary IOMMU support (CALGARY_IOMMU)". This option will provide support for IOMMU for IBM xSeries x366 and x460. This will also make 32-bit PCI devices work-- dual address cycles (DAC: Double Address Cycle) are not supported on these systems-- because the system settings can be problematic when accessing more than 3GB memory. If needed, these IOMMU devices can be turned off at startup with "iommu=off". (these kernel / module parameters will be discussed in future articles)

IOMMU (input/output memory management unit) is a memory management unit (MMU), which connects the DMA-enabled Imax O bus to the main memory. DMA (Direct Memory Access) is a feature supported by many computers that allows specific devices to access memory directly without the aid of CPU. The dual address cycle (Double Address Cycle, DAC) is 64-bit DMA;, while the usual DMA uses 32-bit.

Next, we are asked whether Calgary (Should Calgary be enabled by default) is enabled by default. (CALGARY_IOMMU_ENABLED_BY_DEFAULT). Calgary is the same concept as IOMMU mentioned above. The difference between the two is that IOMMU can support many devices while Calgary can only support IBM IOMMU devices. If you disable it, but you need to use it later, you can use the kernel parameter (iommu=calgary).

Here is a problem that needs to be handled carefully (Enable Maximum number of SMP Processors and NUMA Nodes (MAXSMP)). Enable it only if the kernel runs with many SMP processors and NUMA nodes, such as Core i7 and many AMD CPU chips. If the system lacks or has only a small number of SMP processors and NUMA nodes, the kernel becomes inefficient. Select "No" for this *.

Non-uniform memory access (Non-Uniform Memory Access (NUMA)) is a system where each block of memory takes longer to access other parts of memory. A node is a set of memory. For example, a NUMA system may have three memory chips. Each chip is a node, there is one node / chip on the motherboard with CPU (this is the fastest node), and the other two are on different buses. These two nodes take longer to access than the * nodes.

Note: ccNUMA and NUMA are currently the same, or at least very similar.

Symmetric multiprocessors (Symmetric Multi-Processing (SMP)) are an alternative to NUMA. Its memory is on the same bus. Only a limited number of CPU can access the bus, so this limits the number of processors on the SMP system. However, its memory access speed is the same as that of blocks.

Note: I am compiling the kernel for the AMD64 system, so I will tell you my choices to help readers understand the process and choices. If I don't indicate my choice, then I use the default choice. If you are compiling for different systems or if you have different requirements, you need to make alternative choices in your situation.

Next, unless the configuration tool has made a choice for you, choose the maximum number of CPU that a kernel needs to support. This configuration optimizes the kernel according to the number you give.

Then enable or disable "SMT (Hyperthreading) scheduler support (SCHED_SMT)" (hyper-threaded scheduler support). The SMT scheduler improves CPU decision-making capabilities on Pentium 4 processors that use hyper-threading technology. However, this will lead to additional power consumption, and on some systems * choose "no" as I did.

Hyperthreading is a proprietary SMT parallel microprocessor (implemented by Intel). This is a special form of multitasking / multithreading (doing many tasks at the same time). Parallel multithreading (Simultaneous multithreading (SMT)) improves the efficiency of multithreading execution.

After that, enable or disable "Multi-core scheduler support (SCHED_MC)". This is also a feature to enhance multicore CPU decision-making. However, this time brings extra power consumption, I chose "No".

You can select preemption mode in the next option.

Preemption Model (preemption mode)

1. No Forced Preemption (Server) (PREEMPT_NONE) (non-forced preemption)

> 2. Voluntary Kernel Preemption (Desktop) (PREEMPT_VOLUNTARY) (voluntary kernel preemption)

3. Preemptible Kernel (Low-Latency Desktop) (PREEMPT) (preemptive kernel)

Choice [1-3]: 2

Preemption is the process of pausing an interrupted task intended to continue later. Preemption forces a process to be paused, and preemption cannot be ignored for executing tasks.

Then we were asked about "Reroute for broken boot IRQs (X86_REROUTE_FOR_BROKEN_BOOT_IRQS)". This is a simple fix for fake interrupts. Fake interrupts are useless hardware interrupts, which are usually triggered by electronic products with electronic interference or incorrect connections. Remember, interrupts are signals sent to the processor that require immediate attention.

This option is important for any machine; I suspect that anyone might have a reason to disable this feature (Machine Check / overheating reporting (X86_MCE)). The kernel must be aware of overheating and data corruption, otherwise the system will continue to operate, which will only lead to further damage.

Next, users can enable / disable "Intel MCE features (X86_MCE_INTEL)", which is an additional support for the Intel MCE feature of image heat monitoring. I chose "no" because I was compiling the kernel for the AMD64 processor. Machine Detection anomaly (MCE) is an error output when the processor discovers a hardware problem. MCE usually causes serious kernel errors (kernel panic) (equivalent to a "blue screen" in Windows).

This is the same problem Intel MCE features (X86_MCE_INTEL) except for the AMD device.

Next is the debugging feature (Machine check injector support (X86_MCE_INJECT)) that I will disable. This will allow an injection test. If you occasionally perform machine injection, it is compiled into a module rather than into the kernel. Machine injection enables the device to send a fake error message even if there is no error. This is used to confirm that the kernel and other processes can handle errors properly. For example, if the CPU is overheated, then the phone should be turned off, but how can the developer test the code without damaging the CPU? An injection error is a method because it is just software that tells the hardware to send an error signal.

Note: modules are for features / drivers that may be used or rarely executed. Add only the features / drivers used in many systems that use the kernel to the kernel.

If the kernel is likely to be used on Dell laptops, enable this feature (Dell laptop support (I8K)). Otherwise, if some users may use this kernel on Dell laptops, add it as a module. If this kernel is not going to support Dell laptops, just ignore it as I did. In particular, this support is a system management mode driver that allows Dell Inspiron 8000 series notebooks to access processors. The purpose of the system management mode is to get the temperature and fan status of the processor, which is useful for some systems that need to control fans.

Next, the user can choose microcode loading support (CPU microcode loading support (MICROCODE)). This allows users to update microcode on AMD or Intel chips that support this feature.

Note: in order to load microcode, you must have a legitimate copy of the binary microcode designed for your processor.

This must be enabled if you want to load microcode patches (fix bug or add minor features) to the intel chip (Intel microcode loading support (MICROCODE_INTEL)). I disabled it here.

Then there is a similar option for the AMD chip (AMD microcode loading support (MICROCODE_AMD)).

Enabling this support (/ dev/cpu/*/msr-Model-specific register support (X86_MSR)) allows a processor to have access to x86 special module registers (Model-Specific Registers (MSRs)). These registers are character devices, including devices from minor 0 to 31 under major 202( (/ dev/cpu/0/msr to / dev/cpu/31/msr)). This feature is used in multiprocessor systems. Each virtual character device is connected to a specific CPU.

Note: MSRs is used to change CPU devices, debugging, performance monitoring, and execution tracking. MSRs uses the x86 instruction set.

After that, we have an option "CPU information support (X86_CPUID)" to enable this feature to allow the processor to access x86 CPUID instructions, which needs to be executed on a specific CPU through the character device. These character devices include devices from minor 0 to 31 under major 202s (/ dev/cpu/0/msr to / dev/cpu/31/msr), like those supported by x86_MSR above.

If the processor supports it, enable kernel linear mapping to use 1GB's memory page (Enable 1GB pages for kernel pagetables (DIRECT_GBPAGES)). Enabling this can help relieve the pressure on TLB.

A page is the basic unit of memory itself (bits are the basic unit of data). The size of the page is determined by the hardware itself. A page number table is a mapping between virtual and physical memory. Physical memory is memory on the device. Virtual memory is the address to memory. Depending on the system architecture, the hardware can access addresses that are larger than the actual memory address. For example, a 64-bit system has 6GB memory, and administrators can add more memory when needed. This is because there are many virtual memory addresses. However, on many 32-bit systems, the system administrator can add a piece of 8GB memory, but the system cannot fully use it because there are not enough virtual memory addresses in the system to access large amounts of memory. The conversion backup buffer (Translation Lookaside Buffer (TLB)) is a cache system that increases the conversion speed of virtual memory.

Next, we see the NUMA option (Numa Memory Allocation and Scheduler Support (NUMA)). This allows the kernel to allocate memory available to CPU on the CPU local memory allocator. This support also makes the kernel more aware of NUMA. Few 32-bit systems need this feature, but some general-purpose 645-bit processors use it. I chose "no".

Enable this feature (Old style AMD Opteron NUMA detection (AMD_NUMA)) in order for the system to detect the AMD NUMA node topology in the old way. The next option is an updated detection method (ACPI NUMA detection (X86_64_ACPI_NUMA)). If both are enabled, the new approach will dominate. Some hardware works better in one way than the other.

If you want to debug your NUMA emulation, you can enable the next feature (NUMA emulation (NUMA_EMU)).

Note: if you are not going to debug and you need a fast, lightweight system, disable as many debugging features as possible.

In the next option, select how your kernel intends to handle the number of NUMA nodes. Next, select the memory model, where there may be only one memory model selection. The memory model specifies how memory is stored.

Maximum NUMA Nodes (as a power of 2) (NODES_SHIFT) [6]

Memory model

> 1. Sparse Memory (SPARSEMEM_MANUAL)

Choice [1]: 1

To improve performance, there is an option to optimize pfn_to_page and page_to_pfn operations through virtual memory mapping (Sparse Memory virtual memmap (SPARSEMEM_VMEMMAP)). The page frame number is the number given on each page. These two operations are used to get the page from the number or the number from the page.

The next option is to allow a node to remove memory (Enable to assign a node which has only movable memory (MOVABLE_NODE)). Kernel pages usually cannot be removed. When enabled, users can hot-plug memory nodes, as well as remove memory to allow memory consolidation. As data in and out of memory, a set of data may be divided into different memory as long as there is available space.

Following the previous memory problems, we have more problems. These may have been preconfigured by the configuration tool. The third option (BALLOON_COMPACTION), when enabled, helps reduce memory fragmentation. Fragmented memory slows down the system. The fourth option (COMPACTION) allows memory compression. The fifth option (MIGRATION) listed below allows the page to be moved.

Allow for memory hot-add (MEMORY_HOTPLUG) (allow hot memory addition)

Allow for memory hot remove (MEMORY_HOTREMOVE) (allows hot memory removal)

Allow for balloon memory compaction/migration (BALLOON_COMPACTION) (allows bubble memory normalization and merging)

Allow for memory compaction (memory tidiness allowed)

Page migration (MIGRATION) (page merge)

Note: enabling removable memory enables the above 5 features.

Next, we can "Enable KSM for page merging (KSM)". Kernel same page merging (Kernel Samepage Merging (KSM)) looks at the kernels that the program thinks can be merged. This can save memory if the two pages of memory are exactly the same. A piece of memory can be deleted or merged, and only one piece can be used.

The configuration tool may automatically choose how much memory is saved for user allocation (Low address space to protect from user allocation (DEFAULT_MMAP_MIN_ADDR) [65536]).

The next option is important (Enable recovery from hardware memory errors (MEMORY_FAILURE)). If there is a memory failure and the system has MCA recovery or ECC memory, the system can continue to run and recover. To use this feature, both the hardware itself and the kernel must support it.

Machine detection architecture (Machine Check Architecture (MCA)) is a feature on CPU that can send hardware error messages to the operating system. Error correction code memory (Error-correcting code memory (ECC memory)) is a form of memory devices that detect and correct errors.

Next, the configuration tool automatically enables "HWPoison pages injector (HWPOISON_INJECT)". This feature allows the kernel to mark a bad page as "poisoned", which then kills the program that created the bad page. This helps to stop and correct errors.

To allow the kernel to use large pages (Transparent Hugepage Support (TRANSPARENT_HUGEPAGE)), enable this feature. This speeds up the system but requires more memory. Embedded systems do not have to use this feature. Embedded systems usually have very small memory.

If the above is enabled, then large pages of sysfs support must be configured.

Transparent Hugepage Support sysfs defaults

1. Always (TRANSPARENT_HUGEPAGE_ALWAYS)

> 2. Madvise (TRANSPARENT_HUGEPAGE_MADVISE)

Choice [1-2?]: 2

The following option is to add two system calls, process_vm_readv and process_vm_writev (Cross Memory Support (CROSS_MEMORY_ATTACH)). This allows a privileged process to access the address space of another program.

If you have tmem, it's usually a good idea to enable cache cleanup (cleancache) (Enable cleancache driver to cache clean pages if Transcendent Memory (tmem) is present (CLEANCACHE)). When some memory pages need to be removed from memory, cleancache places the pages on the file system of cleancache-enabled. When the page is needed, the page is put back into memory. Hypermemory (tmem) does not have a set of memory of known size, and the kernel uses indirect addressing for this memory.

The next option allows the exchange page (Enable frontswap to cache swap pages if tmem is present (FRONTSWAP)) to be cached after the tmen is activated. Frontswap places data in the swap partition. This is required for support for exchange features.

* enable the next feature (Check for low memory corruption (X86_CHECK_BIOS_CORRUPTION)). This detects low-level memory corruption. This feature is prohibited during the execution period. To enable this feature, add "memory_corruption_check=1" to the kernel command line (which will be discussed in a later article; this is different from any command line). Even if this feature is executed frequently, it uses very little overhead (close to nothing).

Next, we can set the default setting for memory corruption detection ("Set the default setting of memory_corruption_check (X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK)). You can choose whether to turn memory_corruption_check on or off. * * enable memory corruption detection, otherwise it may lead to data loss and system crash if some important memory is corrupted.

This option focuses on BIOS (Amount of low memory, in kilobytes, to reserve for the BIOS (X86_RESERVE_LOW) [64]). Configuration tools usually know the amount of memory reserved for BIOS.

For Intel P6 processors, developers can enable the storage area type register (MTRR (Memory Type Range Register) support (MTRR)). This is used for AGP and PCI cards connected to VGA cards. Enabling this feature kernel creates / proc/mtrr.

If the X driver needs to add a writeback entry, enable the following option (MTRR cleanup support (MTRR_SANITIZER)). This transforms the layout of MTRR from contiguous to discrete. The storage area type register (Memory type range registers (MTRRs)) provides a way for software to access the CPU cache.

Next, the configuration tool has set some MTRR options

MTRR cleanup enable value (0-1) (MTRR_SANITIZER_ENABLE_DEFAULT) [1]

MTRR cleanup spare reg num (0-7) (MTRR_SANITIZER_SPARE_REG_NR_DEFAULT) [1]

To set page-level buffering control, enable the PAT property (x86 PAT support (X86_PAT)). The page property sheet (Page Attribute Table (PATs)) is the current version of MTRRs and is more flexible than it. If you have experienced startup problems caused by enabling it, disable this feature and recompile the kernel. I chose "no".

This is the end of the Linux kernel on how to configure Devyn. I hope the above content can be of some help and learn more knowledge. If you think the article is good, you can share it for more people to see.

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