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How to use HSE to control the system clock

2025-01-28 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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How to use HSE to control the system clock, many novices are not very clear about this, in order to help you solve this problem, the following editor will explain for you in detail, people with this need can come to learn, I hope you can gain something.

The control system clock (SYSCLK) uses the HSE (external high-speed clock 8m) as the clock source.

First of all, HSE chooses no frequency division when it passes through PLLXTPRE (select frequency division).

Select HSE when it comes to PLLSRC (phase-locked loop clock source is selected)

After PLLMUL (choose octave), choose 9 octave 8m 9m 72m

Note: here you can choose 16 octave, up to 8160144 but not stable enough *

Code implementation

Bsp_rccclkconfig.c

Void HSE_SetSysClk (uint32_t RCC_PLLMul_x) / / the entry parameter here is the number of selected frequency doublers (2-16) {ErrorStatus HSEStatus;// creates clock state variables

/ / enable external high-speed clock RCC_HSEConfig (RCC_HSE_ON); HSEStatus = RCC_WaitForHSEStartUp (); / / wait for the external clock to be turned on if (HSEStatus = SUCCESS) {/ / enable pre-access * * Note * * this is the operation FLASH_PrefetchBufferCmd (FLASH_PrefetchBuffer_Enable) in flash; FLASH_SetLatency (FLASH_Latency_2) / / configure the frequency division factor RCC_HCLKConfig (RCC_SYSCLK_Div1); / / AHB and the system clock (72m) are equal to RCC_PCLK1Config (RCC_HCLK_Div2); / / APB1 is half of the system clock (72m). Note that when APB1 is in ADC mode, the system clock is larger than 36m RCC_PCLK2Config (RCC_HCLK_Div1). / / APB2 is equal to the system clock (72m) / / set the parameters of the phase-locked loop to set the external high-speed clock to choose 9 octave 8" 9" 72m RCC_PLLConfig (RCC_PLLSource_HSE_Div1,RCC_PLLMul_x); / / enable PLL RCC_PLLCmd (ENABLE); / / wait for the PLL clock to stabilize while (RCC_GetFlagStatus (RCC_FLAG_PLLRDY) = = RESET) / / Select the system clock RCC_SYSCLKConfig (RCC_SYSCLKSource_PLLCLK); / / check whether the system clock source is PLL phase-locked loop clock / /-0x00: HSI used as system clock / /-0x04: HSE used as system clock / /-0x08: PLL used as system clock while (RCC_GetSYSCLKSource ()! = 0x08) } else {/ / external clock failed operation}

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