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What does STM32 IIC mean?

2025-01-19 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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This article mainly introduces the meaning of STM32 IIC, has a certain reference value, interested friends can refer to, I hope you can learn a lot after reading this article, the following let the editor take you to understand.

1. IIC definition

IIC is Inter-Integrated Circuit (Integrated Circuit bus). This bus type is a simple, bi-directional, two-wire, synchronous serial bus designed by Philips Semiconductor (later acquired by NXP) in the early 1980s. It is mainly used to connect the whole circuit (ICS). IIC is a multi-directional control bus, that is, multiple chips can be connected to the same bus structure. At the same time, each chip can be used as a control source for real-time data transmission. Multi-master and multi-slave communication protocol.

The following article will explain the IIC protocol in conjunction with NXP's official IIC manual. See the download link at the end of the article.

I2C serial bus generally has two signal lines, one is two-way data line SDA, the other is clock line SCL. All the serial data SDA connected to the I2C bus devices are connected to the SDA of the bus, and the clock line SCL of each device is connected to the SCL of the bus. The highest rate is 400Kbit/s.

2. IIC protocol specification 2.1SDA and SCL signals

Starting condition: the SCL line is high, and the SDA line switches from high level to low level.

Stop condition: the SCL line is high, and the SDA line switches from low level to high level.

Code implementation

Void I2C_Start (void) {/ / IO output SDA_OUT (); SCL_OUT (); I2C_DELAY (); / / IO set high SDA_SET (); SCL_SET (); / / delay I2C_DELAY (); / / low SDA_CLR (); I2C_DELAY (); I2C_DELAY (); SCL_CLR ();}

A similar way to end the signal (not a moving picture)

Code implementation

Void I2C_Stop (void) {/ / IO output SDA_OUT (); SCL_OUT (); / / IO set 0 SDA_CLR (); SCL_CLR (); I2C_DELAY (); SCL_SET (); / / delay I2C_DELAY (); / / SDA set 1 SDA_SET (); I2C_DELAY (); I2C_DELAY ();} 2.4 byte format

Each byte on the SDA data line must be 8 bits, and there is no limit to the number of bytes transferred at a time. Each byte must be followed by an ACK. First of all, the data transmitted is the highest bit (MSB). The data on SDA must be stable during the high-level cycle of SCL, and the change of high and low level of data occurs during the low-level period of SCL.

Each byte is followed by an ACK, and with ACK, you can continue to write or read. NACK, stop.

ACK: the host releases the bus, transmits the high power of the SCL after the last bit of the byte, and pulls down the level from the machine.

NACK: the host releases the bus, the high power of the SCL after the last bit of the byte is transmitted, the slave has no response, and the bus is high.

The animation describes the process of writing

Code implementation

Uint8_t I2C_Send_byte (uint8_t data) {uint8_t k; / / send 8bit data for

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