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How to save chip area by using SRAM

2025-01-16 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Servers >

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SRAM memory is a static random access memory that can store its internal storage data without refreshing the circuit. The DRAM should be refreshed and charged every once in a while, otherwise the internal data will disappear, so the SRAM memory has higher performance. Although SRAM is only a memory, it uses different methods and the area of the chip is different. Based on SRAM, there are two facts:

(1) the SRAM area of 1R1W is much larger than that of 1RW.

The same specification of SRAM, the addition of a set of read and write interfaces, its area will be greatly increased. But there is a way that it is actually possible to replace the SRAM that would otherwise need to use 1R1W with 1RW SRAM, thus saving a lot of area. For example, the 1R1W SRAM memory that originally needs to use 64bit x 2K, the read-write interface is 64bit, it is possible to use 128x1K 1RW SRAM (read and write share one interface), each read and write directly operate on 128bit, so that you can read and write every 2T, and it is possible to pipe, for example: read 128bit-> write 128bit-> read 128bit-> write 128bit. Of course, this replacement method requires SRAM to read and write sequentially rather than randomly.

(2) for SRAM with the same capacity, the ratio of width to depth is different, and its area is different.

For example, the SRAM of 16KB may be 64bit x 2K or 128bit x K, these two specifications are different. Using 64bit x 4K will save more area, and the smaller the chip area will be, the lower the cost. What if my interface needs to be 128bit? Then using 64bit x 4K sram chip, and then double frequency reading and writing can save a lot of area.

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