Shulou(Shulou.com)06/01 Report--

This article is about how to design FIR filters through matlab's fdatool toolbox. The editor thinks it is very practical, so share it with you as a reference and follow the editor to have a look.

Design of FIR filter through matlab's fdatool toolbox

Take the 99-order FIR low-pass filter as an example, learn to use matlab's fdatool toolbox to design the filter, and export the filter coefficients to .coe file, and combine Vivado to design the FIR filter of FPGA.

In this paper, the filter parameters are: low-pass FIR filter, window function design, using Blackman window, 99th order, sampling frequency 32MHz, passband frequency 1.5MHz, when the window function is applicable, the cut-off frequency does not need to be set, and the cut-off frequency is determined according to the selected window function and order.

1. Open matlab

Enter fdatool on the command line, enter, and open the fdatool filter design toolbox.

The initial interface after opening is as follows:

1 selected filter type (lowpass, highpass, bandpass, bandstop)

Choose whether to design IIR (infinite impulse response) filter or FIR (finite impulse response) filter, and choose which method to design the corresponding filter

In general, the more the order of the filter, the better the filter effect, but the more coefficients correspond, which will take up more resources in FPGA hardware implementation, so it should be considered comprehensively in design.

The sampling frequency Fs, passband frequency Fpass and cut-off frequency Fstop of the filter are designed at 4 locations.

two。 Design the required filter

Low-pass (Lowpass), FIR filter, window function design (Window), using Blackman window (Blackman), 99th order (there will be 100coefficients, this is fixed, N-order FIR requires 1 coefficient), sampling frequency 32MHz, passband frequency 1.5MHz, when applicable to the window function, the cut-off frequency does not need to be set, according to the selected window function and order to determine the cut-off frequency.

After setting the parameters according to the above figure, click Design Filter.

After the design is completed, the amplitude-frequency response curve is displayed in the yellow box. It can be seen that using the sampling frequency of Fs=32MHz, the displayed frequency is 0~Fs/2, that is, the amplitude-frequency response of 0-16MHz, and the amplitude is probably reduced to less than the original-60dB around the 2MHz, which translates to an amplitude of less than 1 60dB=20log 1000 (- 60dB=20log (1 60dB=20log 1000)).

3. Parameter quantization

The 16-bit filter parameters are represented by fixed points.

Click the third box on the left to quantify the parameters. It is very troublesome to calculate the floating point number in FPGA, and the operation of the floating point number will affect the performance of the power amplifier during the RF output, which is set to the fixed point (usually set to the fixed point processing). Quantization error will be introduced when quantization is carried out here, the smaller the number of bits, the greater the error, but the more bits, the more resources are needed in the FPGA hardware. The design also needs comprehensive consideration. Here we choose 16-bit fixed-point quantization (Fixed-point).

16-bit fixed-point quantization, other parameters remain default, in fact, the default here is 16-bit, that is, after selecting a fixed point to maintain the default compound requirements, so the toolbox will think that you have not set, the bottom of the apply button is gray, can not be applied.

So you can click any parameter at this time and then change it back, such as changing 16 to 15 and then back to 16, so apply will be able to click.

Click on apply, you can see the difference between quantized and unquantized at the top right. We can see that the solid line is the amplitude-frequency characteristic curve after 16-bit quantization, and the dotted line is the unquantized amplitude-frequency characteristic curve. After quantization, the stopband attenuation after 4MHz is not as large as the original attenuation, but in fact, it can also be attenuated to-100dB. In terms of amplitude, it is 1 / (10 ^ 5), which is enough. Therefore, the use of 16-bit quantization has little effect on the filtering effect of the filter.

As shown in the following figure, when only 4-bit data is used to quantify, the stopband attenuation is not very good, and if the error is high, the high-frequency signal will remain.

4. Export parameter

(1) Export parameters to matlab

As shown below, first click the button at 1 to return to the design interface (do not go back nor affect the export parameters, here to make it more convenient to view the parameters of the filter), then click 2 places File-> Export, pop up 3 places shown in the small interface, click 3 places in the interface Export to export the parameters to matlab, export an array named Num, the name can be modified by yourself, enter Num on the command line and then enter the enter to observe the coefficient.

(2) Export parameters to Xilinx storage file (.coe file)

Click Targets-> XILINX Coeffient (.coe) File

Set the file name (preferably without Chinese and special characters).

A total of 100 parameters are derived, and it can be found that the FIR filter with time-symmetric structure designed in this way, the first parameter is the same as the 100th parameter, and the second parameter is the same as the 99th parameter, corresponding in turn.

Thank you for reading! This is the end of this article on "how to design FIR filters through matlab's fdatool toolbox". I hope the above content can be of some help to you, so that you can learn more knowledge. if you think the article is good, you can share it out for more people to see!

Welcome to subscribe "Shulou Technology Information " to get latest news, interesting things and hot topics in the IT industry, and controls the hottest and latest Internet news, technology news and IT industry trends.