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The MPSOC series processor is the new generation of integrated SOC introduced by Cyrus, which claims to be 5 times higher in performance than the ZYNQ series. Compared with ZYNQ, the most prominent thing of MPSOC is the integration of 4CORE A53 / 2 core R5, GPU, H264 and so on. It is competitive and has great advantages in graphics and image processing and intelligent algorithms. In addition, the MPSOC interface is also very advantageous. Apart from the ACP port, ZYNQ does not provide other cache consistency interfaces, while MPSOC provides CCI bus, A53/R5/GPU/DMA connected to the CCI bus and so on, which can efficiently synchronize data without special operations on cache, which greatly improves the efficiency of data handling. This article uses the Mir MYD-CZU3EG development board to introduce how to draw GPIO through EMIO and control D37 and D41 flicker in SDK.

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Development environment: vivado 2017.4, development board model: Mir MYD-CZU3EG, main chip XCZU3EG-1SFVC784. This series of boards also have 4EV and 5EV versions, and the 3EG version in hand does not support SFP, so the corresponding interface (white part) on the board is empty.

The generated vivado project (you can refer to the previous project if you don't know how to generate it)

Step1 New Block Design

Click OK

Step2 add IP core of PS and configure

Click on the Add IP to add the IP core

Enter mpsoc, then double-click Zynq UltraScale+MPSoC to add mpsoc core

The zynq mpsoc core is shown in the following figure

Double-click zynq mpsoc core to import configuration file

Presets-- > Apply Configuration

The gpio_emio.tcl configuration file is imported here

After the configuration is complete, as shown in the following figure

Right-click on the gpio pin to select Make External

The resulting gpio pin is shown in the following figure

Step3 generates comprehensive files

Step4 generates FPGA top-level files

Step5 add xdc pin constraint

Select Add Create Constraints

Select Create File

Add a gpio_emio.xdc file

Click Finish

Copy the xdc file from the project we provided into this gpio_emio.xdc file.

Step6 generates bit files

Step7 exports hardware profile

Click File- > Export- > Export Hardware- > OK on the menu bar to export the hardware configuration file

Step8 starts SDK and creates a new fsbl

Click File- > Launch SDK- > OK on the menu bar to start SDK

Click FileApplication Project to create a new project

Enter the project name as fsbl

Select Zynq MP FSBL

The generated fsbl is shown in the following figure

Step9 creates a new gpio_emio project

Click FileApplication Project to create a new project

Enter the project name gpio_emio

Select hello_world project template

After the new gpio_emio project is completed, as shown in the following figure

Copy the gpio_emio project program we provided into this hello_world project template

Step10 generates BOOT.bin files

Right-click gpio_emio-> Create boot Image

Click Create Image to generate the BOOT.bin startup file

Copy this BOOT.bin file to the SD card

Development board mode setting, here we set it to SD card startup mode

The development board connects 12V power supply, connects uart serial port, inserts SD card.

When the development board is powered on, the two LED will flash at the same time.

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