Shulou(Shulou.com)06/02 Report--

With the development of SOC technology, the size of CMOS process is shrinking, and the chip integration is getting higher and higher, which increases the power consumption of the chip per unit area. In recent years, portable electronic products such as smart phones, tablet computers, digital cameras and smart bracelets have developed rapidly. for portable electronic products that use batteries, the power consumption of the chip will directly affect the service time and life of the battery. power consumption has gradually become the most concerned issue in large-scale integrated circuit design.

The power consumption in CMOS integrated circuits consists of dynamic power consumption, static power consumption and short-circuit power consumption. Each power consumption expression is shown in the formula:

Among them, Pdynamic is the dynamic power consumption caused by the charge and discharge of the circuit capacitor, which is squared with the power supply voltage; Pleak is the static power consumption, that is, the power consumption caused by the leakage current, which has a first-order relationship with the power supply voltage; Pshort is the short-circuit power consumption of the circuit, which occurs at the moment when NMOS and PMOS are turned on at the same time, and also has a power-power relationship with the power supply voltage. Thus it can be seen that reducing the power supply voltage can directly and effectively reduce the power consumption of the circuit.

The power consumption of SRAM includes dynamic power consumption and static power consumption. The proportion of dynamic power consumption and static power consumption to the total power consumption is not constant, but varies with the development of integrated circuit technology. For each node in the process, the leakage current of MOSFET increases about 5 times. With the reduction of the characteristic size of the device, the static power consumption accounts for an increasing proportion of the total circuit power consumption, and it will inevitably lead to the increase of static leakage current. According to statistics, in the 90nm process, the leakage current power consumption of IC accounts for about 1 of the total power consumption. In the 65nm process, the leakage current power consumption of IC has accounted for more than half of the total power consumption. Because of the square relationship between dynamic power consumption and power supply voltage, the relationship between static power consumption and power supply voltage is first-order. Reducing the power supply voltage can greatly reduce both dynamic power consumption and static power consumption.

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