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The editor will share with you what cpu is made of. I hope you will get something after reading this article. Let's discuss it together.

The composition of cpu is as follows: 1, the kernel of CPU is divided into arithmetic unit and controller; 2, the outer core of CPU is divided into decoder, primary cache and secondary cache; 3. Instruction system, which is a collection of all instructions that can be processed by a CPU, is the fundamental attribute of a CPU.

The composition of cpu is:

I. the kernel of CPU

Structurally, the CPU kernel is divided into two parts: the arithmetic unit and the controller.

(1) arithmetic unit

1. Arithmetic logic operation unit ALU (Arithmetic and Logic Unit)

ALU mainly completes fixed-point arithmetic operations (addition, subtraction, multiplication and division), logical operations (and or non-XOR) and shift operations for binary data. There are also shifters dedicated to handling shift operations in some CPU.

Usually ALU consists of two inputs and one output. Integer units are sometimes called IEU (Integer Execution Unit). What we usually say "CPU is XX bit" refers to the number of bits of data that ALU can handle.

2. Floating point operation unit FPU (Floating Point Unit)

FPU is mainly responsible for floating-point operations and high-precision integer operations. Some FPU also have the function of vector operation, while others have special vector processing units.

3. General register group

The general register group is the fastest set of memory used to hold the operands and intermediate results that participate in the operation.

For the disadvantage that x86 instruction set only supports 8 general registers, the latest CPU of Intel adopts a technology called "register renaming", which enables x86CPU registers to break through the limit of 8 to 32 or more.

4. Special register

Special registers are usually status registers, which cannot be changed by the program and are controlled by CPU itself to indicate a certain state.

(2) Controller

The arithmetic unit can only complete the operation, while the controller is used to control the work of the whole CPU.

1. Instruction controller

The instruction controller is a very important part of the controller. It completes the operations such as fetching instructions and analyzing instructions, and then gives them to the execution unit (ALU or FPU) to execute. At the same time, it also forms the address of the next instruction.

2. Time sequence controller

The function of the timing controller is to provide control signals for each instruction in chronological order. The timing controller includes a clock generator and a frequency doubling definition unit, in which the clock generator emits a very stable pulse signal from a quartz crystal oscillator, which is the main frequency of the CPU, while the frequency doubling definition unit defines that the CPU main frequency is several times of the memory frequency (bus frequency).

3. Bus controller

The bus controller is mainly used to control the internal and external buses of CPU, including address bus, data bus, control bus and so on.

4. Interrupt controller

The interrupt controller is used to control all kinds of interrupt requests, and queue the interrupt requests according to the priority, and give them to the CPU one by one.

Second, the outer core of CPU

1. Decoder (Decode Unit)

This is a x86CPU-specific device that converts variable-length x86 instructions into fixed-length instructions, which are processed by the kernel. Decoding is divided into hardware decoding and micro-decoding, for simple x86 instructions as long as hardware decoding, faster, while complex x86 instructions need to be microdecoded, and it is divided into several simple instructions, the speed is slow and very complex. Fortunately, these complex instructions are rarely used.

2. Primary cache and secondary cache (Cache)

The first-level cache and the second-level cache are produced to alleviate the contradiction between the faster CPU and the slower memory, and the cache is usually integrated in the CPU kernel, while the second-level cache runs faster than the memory in the way of OnDie or OnBoard. For some big data exchange volume work, CPU's Cache is particularly important.

III. Instruction system

To talk about CPU, you also need to understand the instruction system. The instruction set refers to the collection of all the instructions that a CPU can handle, and it is the fundamental attribute of a CPU, because the instruction set determines what kind of program a CPU can run. The CPU we often talk about is X86 series and compatible CPU. The so-called X86 instruction set was specially developed by Intel for its first 16-bit CPU (i8086). Although with the continuous development of CPU technology, Intel has developed newer i80386, i80486 and today's Pentium4 series, but in order to ensure that computers can continue to run all kinds of applications developed in the past to protect and inherit rich software resources (such as Windows series). All CPU produced by Intel continue to use the X86 instruction set. In addition, in addition to Intel, AMD and Cyrix and other manufacturers have also produced CPU that can use X86 instruction set. Because these CPU can run all kinds of software developed for Intel CPU, computer industry insiders list these CPU as CPU compatible products of Intel.

IV. Analysis of the main technologies of CPU

1. Pipeline technology

Pipelining (pipeline) is the first time that InteI has been used in 486chips. An assembly line works like an assembly line in industrial production. In CPU, an instruction processing pipeline is composed of 5 / 6 circuit units with different functions, and then an X86 instruction is divided into 5 / 6 steps and then executed by these circuit units respectively, so that an instruction can be completed in a CPU clock cycle, thus improving the operation speed of CPU.

2. Super pipeline and superscalar technology

Super pipeline means that the internal pipeline of some CPU exceeds the usual 5-6 steps. For example, the pipeline of Intel Pentium 4 is 20 steps long. The more steps (stages) are designed in the pipeline, the faster it can complete an instruction, so it can adapt to the CPU with higher working frequency. Superscalar (supe rscalar) means that there is more than one pipeline in CPU and more than one instruction can be completed in each clock cycle. This design is called superscalar technology.

3. Out-of-order execution technology

Out-of-sequence execution (out-of-orderexecution) means that CPU adopts the technology that allows multiple instructions not to be sent separately to the corresponding circuit units in the order specified by the program. For example, if there are seven instructions in a certain section of the program, CPU will immediately send the instructions that can be executed in advance to the corresponding circuits for execution according to the empty state of each unit circuit and the specific situation of whether each instruction can be executed in advance. Of course, after each unit does not execute the instructions in the prescribed order, the corresponding circuit must rearrange the operation results according to the instruction order specified by the original program before returning to the program. This operation mode of execution after each instruction is disordered is called out-of-order execution (also called out-of-order execution) technology. The purpose of using out-of-sequence execution technology is to make the internal circuit of CPU run at full load and improve the running speed of CPU program accordingly.

4. sub-skill pre-tracking and speculative execution techniques

Branch prediction (branch prediction) and speculative execution (speculatlon execution) are the main contents of CPU dynamic execution technology, and dynamic execution is one of the main advanced technologies adopted by CPU at present. The main purpose of adopting branch prediction and dynamic execution is to improve the operation speed of CPU. The conjecture execution is based on the branch prediction, and the processing after whether the branch prediction program is branched or not is conjecture execution.

5. Instruction special extension technology

Starting with the simplest computer, the instruction sequence can take operands and perform calculations on them. For most computers, these instructions can only perform one calculation at a time. If you need to complete some parallel operations, you have to perform multiple calculations in a row. Such computers use a single instruction single data (SISD) processor. The term "extension instruction" or "special extension" is often mentioned in the introduction of CPU performance, which refers to whether the CPU has the instruction extension to the X86 instruction set. The first extension instructions were "MMX" from InteI, followed by "SSE" in Pentium III, and now the SSE2 instruction set in Pentium 4.

5. The framework and encapsulation of CPU

(1) the framework of CPU

The CPU architecture is determined according to the type and specification of the CPU installation socket. At present, the commonly used CPU can be divided into Socket x and Slot x according to its installation socket specification.

Taking Intel processor as an example, the CPU of Socket architecture is divided into Socket 370s, Socket 423s and Socket 478s, which correspond to Intel PIII/Celeron processors, P4 Socket 423processors and P4 Socket 478processors respectively. The CPU of Slot x architecture can be divided into Slot 1 and Slot 2, which are installed using Slot slots of the corresponding specifications. Slot 1 is the architecture adopted by the early Intel PII, PIII and Celeron processors, and Slot 2 is a larger slot designed to install Xeon in P Ⅱ and P Ⅲ sequences. Xeon is a CPU dedicated to the workgroup server.

(2) the packaging mode of CPU

The so-called packaging refers to the shell used to install the semiconductor integrated circuit chip, which is connected to the pins of the packaging shell with wires through the contacts on the chip, and these pins are connected to other devices through slots on the printed circuit board. It plays a role in installing, fixing, sealing, protecting the chip and enhancing the electrothermal performance.

The packaging mode of CPU depends on the installation form of CPU. CPU installed in Socket socket is usually packaged in the form of PGA (grid array), while CPU installed in Slot X slot is all packaged in the form of SEC (single-side patch box).

1. PGA (Pin Grid Arrax) pin grid array package

At present, the packaging method of CPU is basically PGA packaging, which is surrounded by multi-layer square matrix pins under the chip, and each square matrix pin is arranged along the periphery of the chip at a certain distance. Its pin looks like a needle and is combined with the circuit board in the way of a plug-in. When installing, insert the chip into a special PGA socket. PGA package has the advantages of more convenient plug and unplug operation and high reliability, but its disadvantage is high power consumption. PGA has also derived a variety of packaging methods, the earliest PGA package for Intel Pentium, Intel Pentium PRO and Cxrix/IBM 6x86 processors; CPGA (Ceramic Pin Grid Arrax, ceramic needle grid array) package for Intel Pentium MMX, AMD K6, AMD K6 Ⅲ, VIA Cxrix Ⅲ processors; PPGA (Plastic Pin Grid Arrax, plastic needle matrix) package for Intel Celeron processors (Socket 370s) FC-PGA (Flip Chip Pin Grid Arrax) package for Coppermine series Pentium Ⅲ, Celeron Ⅱ and Pentium4 processors.

2. SEC (unilateral patch cartridge) package

Instead of ceramic packaging, the Slot X architecture uses a printed circuit board with a metal housing that integrates processor components. The plastic package shell of the SEC card is called SEC (Single Edgecontact Cartridge) unilateral patch card box. The SEC card is designed to be plugged into the Slot X slot (about the size of an ISA slot). All Slot X motherboards have a fixing mechanism consisting of two plastic brackets, and an SEC card can be inserted into the Slot X slot between the two plastic brackets.

Among them, the Intel Celeron processor (Slot 1) is packaged by (SEPP) unilateral processor, the Pentium Ⅱ of Intel is packaged by SECC (Single Edge Contact Connector, unilateral contact connection), and the Pentium Ⅲ of Intel is packaged by SECC2.

After reading this article, I believe you have a certain understanding of "what is the composition of cpu". If you want to know more about it, you are welcome to follow the industry information channel. Thank you for reading!

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