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How to use Pblock

2025-04-07 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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How to use Pblock, in view of this problem, this article introduces the corresponding analysis and answers in detail, hoping to help more partners who want to solve this problem to find a more simple and easy way.

Pblock imposes physical constraints on some logic, that is, binding some logic to a fixed resource area on the FPGA. It is a very important method to optimize the routing and improve the timing. The size of the Pblock defines the FPGA resources used by the logical unit, and the location of the pblock defines the location of the logical unit in the FPGA. Typically, the size of a pblock should not exceed 20% of the total design resources. If pblock accounts for a large proportion of resources, a pblock should be divided into lower-level logic.

When we open the integrated design, we switch to the floorplanning option, where we can see the integrated module and the device view.

You can see from netlist that there are two modules, one is the top-level module adder, and there is a mult module. We select the mult module, then right-click, floor planning/draw Pblock, and we can manually draw a pblock. As shown in the following figure, we named pblock, and then we can see the resources it contains: 154slice and 4 DSP.

We can see from pblock property the resources consumed by the mult module allocated as pblock:

When we zoom in on the device view, we can see the area of the pblock, which contains two rectangles. The outer rectangle represents the FPGA area covered by the pblock, and the inner rectangle indicates the FPGA resources consumed by the pblock. That is, our mult module can only use the resource size in the inner rectangle.

We save the manually generated pblock, and we can save the tcl constraint to the xdc file. The constraints in xdc are expressed as:

Three commands are used here:

Create_pblock is used to generate a pblock.

Add_cells_to_Pblock is used to add modules in the design to the pblock.

Resize_pblock defines the location of pblock in FPGA. Two points of slice are used to limit the location of the pblock, and the location of the dsp is also given.

This is the end of the answer to the question on how to use Pblock. I hope the above content can be of some help to you. If you still have a lot of doubts to solve, you can follow the industry information channel for more related knowledge.

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