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How memory units are formed in a computer

2025-02-24 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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I would like to share with you how the memory unit in the computer is composed. I believe most people don't know much about it, so share this article for your reference. I hope you will learn a lot after reading this article. Let's learn about it!

The memory unit of the computer consists of memory and timing access control. According to the level sensitivity and edge sensitivity of the clock, the memory unit is divided into latch and flip-flop; according to the type of input, it can be divided into SR type, JK type, D type and T type.

Memory unit is the basic component of memory, which is composed of internal storage (memory) and sequential access control.

classification

1. One of the categories

According to the level sensitivity and edge sensitivity of the clock, the memory unit is divided into latch and flip-flop, and the register can be two kinds of arrays composed of these two elements, which are described below.

(1) Latch-A level-sensitive memory unit is called a latch. For example, the TTL device 7475 is gated by either a high level or a low level of the input clock.

(2) flip-flop (Flip-flop)-the memory unit sensitive to the edge is called flip-flop. For example the TTL device 7474 is triggered by the rising or falling edge of the input clock.

In many materials, the internal stored value is transparently transmitted by the input data and set to be called a latch. The flip-flop, especially the master-slave latch, means that the reading of the input value and the change of the output value are two opaque independent events. The opacity of the input and output also leads to the prominence of the trigger edge of the clock. Note that the different definitions of latches and triggers reflect different viewing angles, but there is still a connection between them. Change back to the more popular definition above.

(3) Register-generally an array of flip-flops used to store multi-bit data, or a latch array, such as a data bus. Note that individual cases also refer to a single trigger or latch.

2. Category 2

Memory units can also be classified according to the type of input.

(1) SR type-reset type can be subdivided into two types: SR and SR. Figure 1 shall prevail.

At this time, according to the state of the output Q terminal, the memory unit state is either set by the 0 of the S input or reset by the 0 of the R input: if S and R are 1 at the same time, the state is maintained, but S and R must not be 0 at the same time. For SR type in the same narrow sense, the situation is the opposite.

(2) JK type-similar to SR type, but J input and K input can be 1 (state flipping) or 0 (state maintenance) at the same time. Other types of memory units can be constructed with JK type.

(3) Type D-D input provides data (Data). Some sources say that D stands for delay. When a clock event occurs, the output Q value is transparently determined by the input D value.

(4) Type T-you can connect the Q of type D to D and use T as the clock.

It is formed by the input of the terminal. At this time, the output of Q will be the bisector of the T clock signal. A frequency division enabling control terminal can also be added to this T-type.

For memory units, the most important thing is still to store the right data in the right place and at the right time. In order for the memory unit to work reliably, two rated parameters, data establishment time and retention time, which are used to characterize the relationship between data and clock, must be satisfied. For the memory cell circuit triggered by the rising edge of the clock, the minimum stable period of the data before the rising edge of the clock (or the midpoint of the rising edge in the literature) is called sp, and the subsequent period is hp. The cumulative delay factor after the cascade of logic gates often destroys the rating requirements of memory units sp and hp, thus limiting the maximum speed of the whole system. Attention should be paid to this in waveform analysis.

The above is all the contents of this article entitled "how memory units are formed in a computer". Thank you for reading! I believe we all have a certain understanding, hope to share the content to help you, if you want to learn more knowledge, welcome to follow the industry information channel!

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