Shulou(Shulou.com)06/01 Report--

This article is about rt-thread for different architecture chip transplantation method is what, the editor feels very practical, so share with you to learn, I hope you can learn something after reading this article, say no more, follow the editor to have a look.

During the period of transplanting rt-thread system, I have accumulated some experience of rapid migration, whether it is different types of chips of existing architecture or the transplantation of a new architecture, it only needs to follow certain steps, and the general direction will not go wrong. The only thing left is to solve the problem of why it did not achieve the desired results.

There are several milestones for migration:

1. The chip works in normal mode and can execute c code logic normally.

two。 At least one serial port driver

3. Context switching logic

4. The timer can be used normally.

5. Serial port input has normal interrupt and can read data.

Describe the problem and solution in detail according to the above order.

The working mode of the chip

Chips with different architectures must have corresponding patterns suitable for the operation of the operating system, which is a problem considered in chip design, so porting should also follow this rule. In addition, it also involves the access to registers.

For example, armv7, whose operating system exists in system mode, can easily switch to other modes. There is also the el1 privilege level of a more typical armv8 architecture. Of course, it is possible to switch the chip mode to other modes, for example, the whole system of rt-thread runs in el3 privileged mode, which has the highest privilege level in el3, but it is not as high as possible. El3 is often used in a more appropriate way. Generally, the switch to logic is in the first section of assembly code logic executed after the chip is started. Generally, after the chip is powered on, it will enter the highest privilege mode and switch to the operating system-specific privilege mode.

Can execute c code normally

The completion of this step is also the implementation of the assembled code. The general key operation of this step is to clear the zeros of the bss segment and to set the stack pointer address.

The necessity of zeroing the bss segment is due to the syntax rules of the c language, the memory of the previous stored program is very expensive, so when the program is generated, the uninitialized global variables and static variables are not stored in the memory space, and then the area pointed to by this space is cleared when the program is loaded. The non-static variables in the function are stored in the stack and the address is uncertain.

If we do not clear the zeros of bss, the problem may be that the values of global variables and static variables are uncertain, which leads to exceptions in programming.

The step of emptying the bss segment is also simple: set the memory space of the bss segment to 0.

The stack address, that is, the address of the sp, is set only for the initial stack space when the operating system thread has not started scheduling. According to the function call rules of c language, when c language makes function calls, it needs to press the stack and exit the stack, and this stack space is allocated by the user.

Therefore, it should be noted that there is also a stack space before rt-thread starts scheduling. After scheduling starts, the stack space is not used, and each thread stack space takes effect.

At least one serial port driver

To complete this work, the problem to be noticed is that the verification of the serial port driver has been completed in advance. That is, it can receive and send data normally. To complete the rt-thread serial port driver docking, you only need to realize the serial port initialization, serial port receiving, serial port sending, and interrupt registration.

Since there is no interruption in the early stage, the realization of serial port sending function can proceed to the following work.

Normally, you can see that the serial port can output the logo of rt-thread.

Context switching logic

The context of the program can be understood as the site where the program is currently running. The main contents of the site are all the current register states, the current sp values, some processors and PC values, and so on.

For the first scheduled thread, the content of the context is manually assigned. Because there is no guarantee that the first thread executed by the scheduler is a specific thread, each thread stores a manually populated context.

There are three main points to note: after the first thread scheduling starts, the global interrupt is turned on, specifically, when the context is restored, it is implemented by the assembly code. The second is that after the thread exits, the next scheduling is started, and the thread recovery work is done by the idle thread. The third point must be to ensure that the order of the stack is consistent with the order of the stack.

The normal sign of this function is that you can enter the main function and the msh console normally. But can not input control, because there is no serial port input interrupt, if the serial port interrupt has been achieved, then you can msh input.

Timer can be used normally.

Timer can be used normally on the premise that interrupts can be generated normally, and then generate timer interrupts periodically.

Timer is the key of system tick. Without timer, the system will not be able to release CPU resources through delay in tasks, but it can be scheduled by actively switching tasks.

With regard to the question of how many appropriate time slices for the tick of rt-thread, it is explained here that generally suitable 10ms can be 1ms for chips with high main frequency. Once verified on the FPGA of the main frequency of 30mhz, it is found that the system does not work properly. Analysis because the system timer interrupt is too frequent, the main frequency is too low, the program is too late to complete the interruption.

Serial port can be input normally.

This step can be used as a successful verification of the port. the work of this step is not a technical difficulty, but often the previous steps are not successful, which may lead to undesirable phenomena here.

For example, when he once assisted a customer to complete the migration work, he found that after the serial port was interrupted and opened, he could only enter a string and did not respond, and later found that the interrupt processing flag was not empty.

Generally, the input and output can be normal, and the system transplantation is basically successful.

The difficulty of transplant

For the above steps, the most difficult are stack frame planning, context switching and interrupt handling.

Combined with the actual migration experience, the common problem is that the order of entering and leaving the stack does not match, or some registers are not stored in the stack. In this work, to check whether the register is 32-bit or 64-bit, this small detail may lead to the offset of the stack frame.

In addition, it should be noted that when the thread runs the stack, we must press the recovery function after the thread exits. Once, because we did not pay attention to this detail, the system ran abnormally after the main function exited.

The complex design of interrupts lies in the nesting of interrupts, which often performs scheduling in interrupts, and does not immediately execute to the context of the switching thread, which destroys the scene, but switches the context after all interrupts have been executed. This is easy to understand on cortex-m. When handling pendsv exceptions, the interrupt controller always waits for other high-priority interrupt processing to complete before processing the lowest-priority pendsv. For the design of sparc, the switching task is realized by trap exception, and the trap exception is higher than the interrupt, that is, the priority of the switching thread is higher than the interrupt, which is unreasonable in the system design. When designing the software, we often set the interrupt nesting flag bits, wait until all the interrupts are completed, and then switch the context. We must not switch the context during the interrupt execution.

Transplant experience sharing

There are some key points in the migration of rt-thread. If you find these key points, you can plan the direction and goal very smoothly, and technical conquest for each key point, which is the fastest and most efficient way to do things.

If you want to port different chip architectures, you need to be very clear about the architecture of this chip, and you also need to be very familiar with the underlying code that is the most critical point of the rt-thread system. Generally familiar with the underlying code of rt-thread is not very difficult, from the beginning to read aarch74's rt-thread minimum system to achieve two or three days can almost understand, and chip manual reading should be combined with practical work experience, to find out the chip privileged mode, understand the register, read the assembly is basic on it. Of course, some processors need to implement mmu to execute properly, such as aarch74, which must implement the function of mmu, even if it is 1:1 mapping.

The above is what is the method of porting rt-thread to different architecture chips. The editor believes that there are some knowledge points that we may see or use in our daily work. I hope you can learn more from this article. For more details, please follow the industry information channel.

Welcome to subscribe "Shulou Technology Information " to get latest news, interesting things and hot topics in the IT industry, and controls the hottest and latest Internet news, technology news and IT industry trends.