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This article mainly introduces "how to use Linux Automation Construction tools Makefile and make". In daily operation, I believe many people have doubts about how to use Linux Automation Construction tools Makefile and make. Xiaobian consulted all kinds of materials and sorted out simple and easy-to-use operation methods. I hope it will be helpful to answer the doubts about "how to use Linux Automation Construction tools Makefile and make". Next, please follow the editor to study!

Makefile

Makefile is a text file that records the process of building rules for a project. Whether you can write makefile in your work shows from one side whether a person has the ability to complete a large project. At the same time, the source files in a project are not counted, and they are placed in several directories according to type, function and module. Makefile defines a series of rules to specify which files need to be compiled first, which files need to be compiled after compilation, which files need to be recompiled, or even carry out more complex functional operations. The advantage is that "automatic compilation", once written, only needs a make command, and the whole project is compiled automatically.

Translation greatly improves the efficiency of software development.

Make

Make is a command tool, is a command tool to explain the instructions in makefile, generally speaking, most IDE have this command, such as: Delphi's make,Visual C++ nmake,Linux under the GNU make. It can be seen that makefile has become one.

A compilation method in engineering. Make is a command, makefile is a file, and two are used together to automate the build of the project.

working principle

In Makefile, dependencies between various files will be formed, for example, a code.exe is generated through links on the basis of code.o, while code.o is formed through assembly on the basis of code.s, code.s is generated through compilation on the basis of code.i, and code.i is generated after pre-processing on the basis of code.c, so find the source layer by layer. The rule uses the flashback method to treat the first file as the final file, and if the current file is not generated, it will be pushed forward layer by layer through the dependency relationship and the method of mutual generation, and finally complete the formation of all files.

Dependency relationship

Avatar B    An is dependent on B

Dependent method

The gcc option + B-o + A    An is the file generated by B after processing

Project cleanup

The project needs to be cleaned, such as clean, is not directly or indirectly associated with the first target file, then the commands defined later will not be executed automatically, however, we can show that it is to be executed by make. That is, the command-- "make clean", to clear all target files for recompilation. But in general, the object file of our kind of clean, we set it as a pseudo-target, decorated with .PHONY, and the characteristic of the pseudo-target is that it is always used

Executed.

Principle

Make will look for files named "Makefile" or "makefile" in the current directory.

If found, it will find the first file in the contents of the file and take this file as the final target file.

If the file does not currently exist, or if the dependent file of the file is modified more recently than the current file, then he will execute the command defined later to generate the current file.

If the dependent file for the file does not exist, then follow the steps in steps 2 and 3, as in steps 2 and 3, until the final source file is found

Of course, your C and H files exist, so make will generate .o files, and then use .o files to declare the ultimate task of make, that is, to execute files.

This is the dependency of the entire make, and make looks for file dependencies layer after layer until the first target file is compiled.

In the search process, if an error occurs, such as the last dependent file can not be found, then make will directly exit and report an error, while make will ignore the error of the defined command or the unsuccessful compilation.

Make only cares about file dependencies, that is, if the file after the colon is still not there after I find the dependency, then I'm sorry, I won't work.

Make will only find the first target object to generate each time in Makefile, and then exit (no second object will be generated)

.PHONY: clean

Clear:

   rm-rf $(obj)

[supplement]

1. Use of predefined variables: [$@], [$^], [$

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