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This article shares with you the content of the sample analysis of STM32 Flash. The editor thinks it is very practical, so share it with you as a reference and follow the editor to have a look.

01. Overview

Flash here refers to the Flash integrated within STM32F207.

Flash memory has the following characteristics

The ability to up to 1m bytes

128-bit, that is, 16-byte data reading

Byte, halfword, word and double word write

Sector erasure and batch erase

The composition of memory

The main storage block consists of four 16K-byte sectors, one 64K-byte sector and seven 128K-byte sectors.

The system memory is used to boot the device in the system boot mode. This piece is reserved for ST. Including bootloader program, boot program is used to program Flash through the following interface. USART1, USART3, CAN2, USB OTG FS device mode (DFU: device firmware upgrade). The boot program is written during ST manufacturing to protect against error writing and erasure operations.

512OTP (one time programming) bytes are used for user data. The OTP area contains 16 additional bytes to lock the OTP data for the response.

Option byte, read-write protection, BOR level, software / hardware watchdog and reset when the setting is in standby and down state.

Low power mode (refer to the PWR section of the reference manual)

Compare the boot section of the reference manual

When BOOT0 is 0, the main storage area is running.

Run the system store when BOOT0 is 1 and BOOT1 is 0

The system storage runs ST factory bootloader code, skipping the user's code. If the JTAG pin is locked in the application layer code (using the JTAG pin for normal GPIO), we can modify the state of the boot pin, enter the system storage, and then debug.

02, Flash Operation 2.1, read

The built-in Flash is on the data bus of CortexM3, so it can be addressed between universal address spaces, and any read operation of 32-bit data can access the data on the Flash.

Data32 = * (_ _ IO uint32_t*) Address

Convert the Address to a 32-bit integer pointer, then take the value of the address that the pointer points to, and you get the 32-bit data on the Address address.

2.2, erase

The Flash erase operation can be performed for sectors or the entire Flash (batch erase). When performing a batch erase, the OTP sector or the configuration sector is not affected.

Sector erase step

1. Check the BSY bit in the FLASH_SR register to confirm that no Flash operation is currently performed

2. Place SER location 1 in the FLASH_CR register and select the sector to erase (SNB) (one of the 12 sectors in the main memory block)

3. Change STRT location 1 in the FLASH_CR register

4. Wait for BSY bits to clear zero

Batch erase step

1. Check the BSY bit in the FLASH_SR register to confirm that no Flash operation is currently performed

2. Change MER location 1 in the FLASH_CR register

3. Change STRT location 1 in the FLASH_CR register

4. Wait for BSY bits to clear zero

ST provides corresponding library function interface.

FLASH_Status FLASH_EraseSector (uint32_t FLASH_Sector, uint8_tVoltageRange) FLASH_Status FLASH_EraseAllSectors (uint8_tVoltageRange)

Notice that there is a special parameter VoltageRange, which is because

There is no translation here, that is, the number of bits accessed is different under different voltages. We are 3.3V, so it is 32-bit data, which is why we are reading 32-bit data.

2.3, write

Must be erased before writing, which is the same as the NorFlash operation.

After reset, the Flash controller register (FLASH_CR) is not allowed to be written to protect the Flash flash memory from other operations due to electrical reasons. Here are the steps to unlock it.

1. Write KEY1 = 0x45670123 in the Flash key register (FLASH_KEYR)

2. Write KEY2 = 0xCDEF89AB in the Flash key register (FLASH_KEYR)

After setting the LOCK position in the FLASH_CR register to 1, the FLASH_CR register can be locked again through the software.

ST provides library functions

FLASH_Unlock (); / / unlock FLASH_Lock (); / / relock

Note:

When the BSY position in the FLASH_SR register is 1, the FLASH_CR register cannot be accessed in write mode. When the BSY position is 1, any attempt to write to the register will cause the AHB bus to block until the BSY bits are cleared.

This requires us to judge the BSY bit in the FLASH_SR register before writing.

ST provides corresponding library functions

FLASH_ClearFlag (FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR)

Write step

1. Check the BSY bit in FLASH_SR to confirm that no major Flash operation is currently performed

2. Change the PG position 1 in the FLASH_CR register.

3. Write to the specified address with different bit widths

4. Wait for BSY bits to clear zero

For the write interface, ST provides the corresponding library functions, providing 8-bit, 16-bit, 32-bit operation, because we are 3.3 V voltage, so use 32-bit write interface

FLASH_Status FLASH_ProgramWord (uint32_t Address, uint32_t Data) 2.4, interrupt

If the write requirement is high, it can be interrupted, and for the write completion, the write error will have a responsive interrupt response. I didn't study it in detail, either. See Section 15.5 of the Flash programming Manual.

03. Overview of Flash Protection 3.1

Flash has a read-write protection mechanism, which is mainly implemented with optional addresses. And one-time programming protection.

This describes the composition of option bytes

User modifies option byte

To run any operation on this sector, the option lock bit (OPTLOCK) inthe Flash option control register (FLASH_OPTCR) must be cleared. Tobe allowed to clear this bit, you have to perform the followingsequence:

1. Write OPTKEY1 = 0x0819 2A3B in the Flash option key register (FLASH_OPTKEYR)

2. Write OPTKEY2 = 0x4C5D 6E7F in the Flash option key register (FLASH_OPTKEYR)

The user option bytes can be protected against unwanted erase/programoperations by setting the OPTLOCK bit by software.

The unlocking Flash described above is the same, that is, to write a value that cannot be written.

ST provides corresponding library functions.

Void FLASH_OB_Unlock (void) void FLASH_OB_Lock (void)

To modify a user byte

1. Check the BSY bit in the FLASH_SR register to confirm that no Flash operation is currently performed

2. Write the required option value in the FLASH_OPTCR register

3. Set the option startup bit (OPTSTRT) in the FLASH_OPTCR register to 1

4. Wait for BSY bits to clear zero

3.2 read protection

From the overview above, there are three levels of Flash read protection.

Level 0: no protection

When 0xAA is written to the read protection option byte (RDP), the read protection level is set to 0. At this point, all read / write operations related to Flash or backup SRAM (if write protection is not set) can be performed in all bootstrap configurations (Flash user bootstrap, debug, or RAM bootstrap).

Level 1: flash read protection

This is the default read protection level after erasing option bytes. Read protection level 1 is activated when any value (except 0xAA and 0xCC used to set level 0 and level 2, respectively) is written to the RDP option byte. After setting read protection level 1:

-No Flash access (read, erase, and program) will be performed when connecting debug functions or bootstrapping from RAM. The Flash read request will cause a bus error. When using the Flash user bootstrap function or in the system memory bootstrap mode, all operations can be performed.

-after level 1 is activated, if the protection option byte (RDP) is programmed to level 0, batch erasure will be performed on the Flash and backup SRAM. Therefore, the user code area is cleared before the read protection is removed. The batch erase operation erases only the user code area. Other option bytes, including write protection, will remain the same as before the batch erase operation. The OTP area is not affected by the batch erase operation and remains the same.

Batch erasure is performed only if level 1 is activated and level 0 is requested. When the protection level is increased (0-> 1 minute 1-> 2-> 2), batch erasure is not performed.

Level 2: disable debugging / chip read protection

Note:

In the note, it is written that if level 2 read protection is enabled, permanently disabling JTAG ports (equivalent to JTAG fuses) ST cannot be analyzed. To put it bluntly, there is no way to debug. At present, I do not use this level of read protection.

Read protection library function

Void FLASH_OB_RDPConfig (uint8_t OB_RDP)

Query read protection state library function

FlagStatus FLASH_OB_GetRDP (void) 3.3 write protection

The user sectors (0 to 11) in the Flash have a write protection function to prevent accidental write operations due to the running of the program counter (PC). When the non-write protection bit (nWRPi, 0 ≤ I ≤ 11) in sector I is low, erasure or programming operations cannot be performed on sector I. Therefore, batch erasure cannot be performed if a sector is write protected.

If you attempt to erase / program an area in the Flash that is in a write-protected state (sectors protected by write-protected bits, locked OTP areas, or Flash areas that can never be written, such as ICP), the write-protected error flag bit (WRPERR) in the FLASH_SR register is set to 1.

Write protection library function

Void FLASH_OB_WRPConfig (uint32_t OB_WRP, FunctionalState NewState)

Query write protection status library function

Uint16_t FLASH_OB_GetWRP (void) 04, one-time programmable bytes

Did not use, use the chip will be useless, did not do this level of protection and other protection, you can see the Flash programming manual 2.7 chapter

05, Code

On the question of how to call read-write protection code, there are instructions for calling in the stm32f2xx_flash.c file.

/ * * @ defgroup FLASH_Group3 Option Bytes Programming functions * @ brief Option Bytes Programming functions * @ verbatim = Option Bytes Programming functions = This group includes the following functions:-void FLASH_OB_Unlock (void)-void FLASH_OB_Lock (void)-void FLASH_OB_WRPConfig (uint32_t OB_WRP, FunctionalState NewState)-void FLASH_OB_RDPConfig (uint8_t OB_RDP)-void FLASH_OB_UserConfig (uint8_t OB_IWDG Uint8_t OB_STOP, uint8_t OB_STDBY)-void FLASH_OB_BORConfig (uint8_t OB_BOR)-FLASH_Status FLASH_ProgramOTP (uint32_t Address Uint32_t Data)-FLASH_Status FLASH_OB_Launch (void)-uint32_t FLASH_OB_GetUser (void)-uint8_t FLASH_OB_GetWRP (void)-uint8_t FLASH_OB_GetRDP (void)-uint8_t FLASH_OB_GetBOR (void) Any operation of erase or program should follow these steps: 1. Call the FLASH_OB_Unlock () function to enable the FLASH option control register access 2. Call one or several functions to program the desired Option Bytes:-void FLASH_OB_WRPConfig (uint32_t OB_WRP FunctionalState NewState) = > to Enable/Disable the desired sector write protection-void FLASH_OB_RDPConfig (uint8_t OB_RDP) = > to set the desired read Protection Level-void FLASH_OB_UserConfig (uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY) = > to configure the user Option Bytes. -void FLASH_OB_BORConfig (uint8_t OB_BOR) = > to set the BOR Level 3.Once all needed Option Bytes to be programmed are correctly written, call the FLASH_OB_Launch () function to launch the Option Bytes programming process. @ note When changing the IWDG mode from HW to SW or from SW to HW, a system reset is needed to make the change effective. 4. Call the FLASH_OB_Lock () function to disable the FLASH option control register access (recommended to protect the Option Bytes against possible unwanted operations) @ endverbatim * / Thank you for reading! This is the end of this article on "sample Analysis of STM32 Flash". I hope the above content can be of some help to you, so that you can learn more knowledge. if you think the article is good, you can share it for more people to see!

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