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AliOS Things SMP system and its example analysis implemented on esp32, aiming at this problem, this article introduces the corresponding analysis and solution in detail, hoping to help more partners who want to solve this problem to find a more simple and feasible method.

AliOS Things implements the basic SMP scheduling framework and supports the system operation and scheduling mechanism of multi-CPU system. Tasks can be dynamically switched between multiple cores or bound to run; high-priority tasks can maximize the use of free resource cores. Based on this framework, we can quickly realize the migration of AliOS Things in different multi-core CPU architectures.

AliOS Things implements the basic SMP scheduling framework and supports the system operation and scheduling mechanism of multi-CPU system. There is no difference between multi-CPU on the operation of user systems, and they can equally access shared memory, peripherals and other shared resources; tasks can be dynamically switched or bound to run among multiple cores; and high-priority tasks can maximize the use of idle resource cores.

Based on this framework, we can quickly realize the migration of AliOS Things in different multi-core CPU architectures; for upper applications, we can not pay attention to the running core and underlying implementation of the task, or we can specify that a task runs in a specific core. This implementation framework maximizes the efficiency of transplanting SMP functions on different CPU, and ensures the simplicity of the upper application using SMP system.

1. Basic characteristics of AliOS Things SMP

Feature 1: multi-CPU fair task switching mechanism, equal access to shared resources

Feature 2: high priority tasks make rational use of idle CPU resources

Feature 3: support for task binding core operation

Feature 4: support for fast migration under different CPU

Feature 5: compatible with single core interface and providing SMP kernel extension interface

2. AliOS Things SMP feature migration framework

Using the SMP framework of AliOS Things, you can quickly migrate to different CPU systems to quickly realize the SMP function. The following lists the implementation items required for migration to complete the SMP function of the corresponding CPU:

2.1 Core boot loading

The current startup sequence is that the system starts the 0 core by default, starts the loading of other cores in the main task entrance of the 0 core, makes them enter the task scheduling, and completes the synchronization of the multi-core startup phase: the core enters the idle task as a sign of the completion of the kernel startup.

2.2 internuclear interruption

Main role: trigger other cores for scheduling. After a task joins the ready task queue or the task timeout expires, if the task is bound to another core or has a higher priority than the task being executed by other cores, the corresponding core will be triggered to switch tasks.

2.3 internuclear lock

Due to the problem of synchronous mutual exclusion between multiple cores, it is necessary to implement the function of intercore locking, which is used to access shared resources, such as task queues, memory and so on. At present, two inter-core locks are used for task-related resource scheduling and memory management, which must support intra-core reentrant and achieve the purpose of inter-core mutual exclusion.

The above functions need to be ported and implemented under different CPU/MCU architectures to complete the underlying interface support needed by SMP. OS has provided a standard implementation interface, refer to the SMP migration example of esp32 below.

3. SMP migration example is supported on Esp32

At present, AliOS Things has completed the implementation of SMP on esp32, and it will continue to support other multicore CPU, such as cortex-A9 and other series of multicore CPU. Refer to the following migration description points for migration:

3.1 SMP compiled macros

For a multicore CPU,OS, both single-core and multi-core frameworks are supported by a single version of different compiled macros. Specify-DRHINO_CONFIG_CPU_NUM=X (number of cores) in Makefile, or modify the RHINO_CONFIG_CPU_NUM macro in k_config.h to specify the number of cores. Recommend the first way.

3.2 multicore loading interface

According to the description of chapter 2.1, the startup sequence of the system is to start the 0 core by default, and start other slave cores and achieve synchronization within the 0 core master task.

Other core interfaces need to be loaded: void os_load_slavecpu (void)

The internal implementation needs to complete the reset startup of the remaining cores, initialize the necessary hardware, and also enter the cpu_first_task_start to enter the scheduling after the slave cores are initialized; at this stage, the 0 core needs to execute the os_wait_allcore interface to wait for the startup of all cores to be completed, which is marked by the fact that all cores can enter the idle task. Os_wait_allcore is a general implementation interface, and cpu_first_task_start is implemented with a single core.

3.3 Intercore interrupt interface

This section needs to complete the adaptation of three interfaces:

3.3.1 initialization: void os_crosscore_int_init ()

Complete the hardware initialization of the intercore interrupt, and this interface needs to be called during multicore initialization.

3.3.2 trigger API: void cpu_signal (uint8_t cpu_num)

The internal implementation needs to be completed to trigger the interrupt corresponding to the target core.

3.3.3 intercore interrupt handling: void os_crosscore_isr (void * arg)

The krhino_intrpt_exit API needs to be called inside the API, which implements the task scheduling of the current core through cpu_intrpt_switch; if you need to clear the interrupt source, clear the interrupt source.

3.4 Intercore lock interface

This part needs to complete the adaptation of three necessary interfaces:

3.4.1 initialization: void cpu_spin_lock_init (kspinlock_t * lock)

Assign the initial value to the lock structure; users can implement according to their own needs, or you can refer to the esp32 implementation code.

3.4.2 add and unlock: the basic principle is to support nuclear nesting and inter-nuclear mutual exclusion

Void cpu_spin_lock (kspinlock_t * lock)

Int32_t cpu_spin_unlock (kspinlock_t * lock)

The lock implementation can refer to the corresponding implementation on esp32.

3.5 SMP directory structure

Refer to esp32 and create a new smp directory under platform/mcu/esp32. Smp_port.h lists the interfaces described above that need to be ported. Smp_load.c is the implementation of core loading, smp_int.c is the implementation of intercore interrupt, and smp_sync.c is the implementation of intercore synchronous interface.

After docking the above interfaces, the corresponding files are added to the compilation system, and the SMP migration adaptation can be completed.

3.6 other considerations

When implementing tasks and interrupt switching assembly portXX.S, we need to consider the compatibility of single-core and multi-core, mainly to access multicore arrays such as g_current_task. You can refer to the portasm.S implementation in esp32.

4. SMP-related kernel interfaces

Under the multi-core SMP mechanism, kernel is compatible with all single-core external interfaces and provides necessary SMP extension interfaces for users to use.

The above interface binds the task to the core to make it run in a certain core. If you use an unbound interface, the core on which the task runs is random.

5. SMP running example on esp32

The following figure shows the task status diagram of Alios Things implementing SMP on esp32:

The Cpu_ bindex column indicates whether the task is bound to the core, cpu_num indicates the current running core of the task, and cur_exc indicates the current running status of the task.

After the migration of Smp features is completed, it also needs to pass the test certification of kernel use cases.

This is the answer to the question about the AliOS Things SMP system and its sample analysis implemented on esp32. I hope the above content can be of some help to you. If you still have a lot of doubts to be solved, you can follow the industry information channel for more related knowledge.

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