Shulou(Shulou.com)06/01 Report--

It was so hot and dry in the morning that I suddenly remembered that someone had communicated with me about the problem of TSO three weeks ago. I also described its principle, which is very simple. It is nothing more than relying on the network card hardware to segment and calculate checksum, thus liberating the CPU cycle. In fact, only one is enough. Since hardware is used to segment, checksum can only be calculated by hardware, because you don't know the details of hardware segmentation at all, so you can't calculate the checksum.... of each segment before segmentation.

Almost everyone knows the principle of TSO, in fact, how it is implemented is not difficult, the difficulty is the details. After finishing the work, I want to show this principle, of course, it may be very different from the actual implementation, anyway, it is a principle block diagram, careful observation, should also be able to achieve a better TSO than mine.

This design is a category of digital logic, sequential circuits, and this field is so high-end that it is not something that the average software programmer can hold to live in, nor can a half-bottle like me. So I am still as usual, trying to give a result directly, instead of asking the listeners to make some preparations, often when people do these preparations, they are tired of giving up.

Basic knowledge is not difficult, that is, some gate circuits, and gates, non-gates, comparators, decoders, triggers and so on, these things randomly find a computer composition principle, are very complete. The key is how to combine them, which is another area of programming. At this time, I remembered a sentence that Liu Danqing, an old wet physics student in my high school, said 15 years ago when he was talking about the circuit: let the current flow. This sentence is completely inconsistent with the basic principles of circuit design in the view of the Koban people. They may prefer to first model, then analyze, then use the description language VHDL to write the code, and finally give the circuit. I think this is suitable for the design itself, but it is not suitable for telling a layman about its brilliance. For a layman, the only thing he knows is to let the current flow for a moment, then rush through this door, then rush through that tube, well, the high level becomes low. As far as I'm concerned, that's what happened.

On a blank piece of paper, draw a bunch of door circuits, and then randomly combine them, slowly, I suddenly found that this circuit is the framework of TSO. I remember helping people solidify the routing forwarding table last week, but that kind of solidification behavior may be dropped by pass because the cost is too high. After all, today's soft implementation is enough. So only the core transmission network needs this kind of fixed forwarding table, but TSO is the first push in the server field. There are too many servers, far more than core forwarding devices, and their CPU needs to be reduced. Indeed, CPU is a bit wasteful to calculate some fixed-mode things, and it should spend more energy on dealing with things that are uncontrollable. So this kind of thing of TCP segmentation is naturally done by the network card. You, me, he, we have all encountered TSO, but we will only turn it on and off. If you want to know how it Offload, please take a look at the following picture to make the current flow first-rate:

There is a big difference between TCP segmentation and IP fragmentation, which you must understand. Then you can understand the picture above.

The above parsing is just a special case, in fact, all hardware acceleration mechanisms are nothing more than the same mechanism. When I was reading the manual of Intel Gigabit / 10 Gigabit network card, I thought that inside the chip, the components of this circuit are almost massive, such as RSS, hardware hash classification and so on. This is what I call the flooding of rivers, engulfing the earth instantly along the ravines, how to dig trenches to fill the ravines, this is not the purpose of this article, this article only describes this possibility. This is also the essential difference between this special circuit and general CPU. CPU has an instruction set, which means that it focuses on how to call it externally, while the special circuit focuses on the internal execution logic. It provides almost no external interface, the only thing is to set the values of several registers, such as MTU, packet length, packet header length, etc., other execution logic, the external has no right to interfere. This is the essential difference between serial programming and parallel execution.

There is also something to say about the instruction system. In terms of internal control logic, there is a unified instruction distribution system, which actually emits a series of combinations of 0 and 1, in which 0 and 1 act on various gate circuits, which accept these different inputs. produce different outputs, and then as inputs to other gate circuits, resulting in different outputs, and so on. Isn't that the case? It's hard for you to decide.

Let the current flow be first-class. If you think it is more abstract, then observe the process of flooding. The disaster caused by the break of the dike is different according to the location of the river. The key lies in the topography where the dike breaks and the various topography connected to it. All of this happens at the same time, and like the current, when the water passes through a bend or an arch bridge, there will be some delay and diversion. This can be compared to the various doors in the circuit.

Let's eat, let's eat, how annoying!

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