Shulou(Shulou.com)06/01 Report--

Today, I will talk to you about what specifications need to be paid attention to when conducting EMC testing, which may not be well understood by many people. in order to make you understand better, the editor has summarized the following contents for you. I hope you can get something according to this article.

The three elements of electromagnetic interference are interference source, interference transmission path and interference receiver. EMC conducts research around these issues. The most basic interference suppression techniques are shielding, filtering and grounding. They are mainly used to cut off the transmission of interference. The broad electromagnetic compatibility control technology includes suppressing the emission of interference sources and improving the sensitivity of interference receivers, but it has been extended to other disciplines.

The consideration of electromagnetic compatibility in the design stage of printed circuit board will reduce the electromagnetic interference of the circuit in the prototype. The types of problems include common impedance coupling, crosstalk, radiation generated by high-frequency current-carrying wires and picking up noise through the loop formed by interconnection wiring and printed wiring, etc., so what are the specific specifications that we need to pay attention to in EMC testing?

In high-speed logic circuits, such problems are particularly vulnerable for a number of reasons:

1. The impedance of power supply and ground wire increases with the increase of frequency, and the common impedance coupling occurs frequently.

2. The signal frequency is higher, and it is more effective to couple to the footline through parasitic capacitance, and crosstalk occurs more easily.

3. Compared with the clock frequency and the wavelength of harmonics, the radiation of the signal loop is more significant.

4. the impedance mismatch caused by the reflection of the signal line.

I. overall concept and consideration

1. The May 15 rule, that is, if the clock frequency to 5MHz or the pulse rise time is less than 5ns, the PCB board shall adopt a multilayer board.

2. Different power supply planes cannot overlap.

3. Common impedance coupling problem.

VN1=I2ZG is the noise voltage induced by the power supply I2 through the ground plane impedance ZG in the No. 1 circuit.

Since the ground plane current may be generated by multiple sources, the induced noise may be higher than the sensitivity of the mode electricity or the immunity of the digital electricity.

Solution:

① analog and digital circuits should have their own circuits, and finally single point grounding.

The wider the ② power cord and loop, the better.

③ shortens the length of printed line

④ power distribution system is decoupled.

4. Reduce the area of the loop and the intersection area of the two loops. 5. An important idea is that the EMC on PCB mainly depends on the Z of DC power cord.

1. The crystal oscillator is as close to the processor as possible

2. Analog circuits and digital circuits occupy different areas.

3. The high frequency is placed on the edge of the PCB board and arranged layer by layer.

4. Fill the vacant area with land.

Third, wiring

1. The power cord and the loop are as close as possible, and the best way is to go on one side.

2. Provide a zero-volt loop for the analog circuit, and the signal line and return line are small and 5:1.

3. For the crosstalk of long parallel lines, increase the spacing or add a zero-volt line between the lines.

4. Manual clock wiring, far away from the Icano circuit, special signal return line can be considered.

5. Key lines such as reset lines are close to ground return lines.

6. In order to minimize crosstalk, double-sided # wiring is used.

7. Avoid walking at right angles on high-speed lines.

8. The strong and weak signal lines are separated.

IV. Shielding

1. Screen > Model:

3. The grounding of the signal circuit shield.

The grounding point is selected on the ground wire of the output terminal such as the amplifier.

4. For the cable shield, when L < 0.15 λ, it is generally grounded at a single point at the output end. L

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