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How to draw PCB with Allegro

2025-01-28 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Internet Technology >

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This article is about how to use Allegro to draw PCB. The editor thinks it is very practical, so share it with you as a reference and follow the editor to have a look.

Before we start drawing PCB with allegro, let's take a look at the unit conversion:

1mil = 0.0254 mm

1mm = 39.3701 mil

By default, we prefer to draw PCB boards in mil units.

The basic process of drawing PCB using allegro is as follows:

1 newly built project, File-- > New …

-> [Project Directory] display the project path

-> [Drawing Name] Project name, Browse … Project path can be selected

-> [Drawing Type] Project type, draw PCB board and select Board, package select Packagesymbol

2 set canvas parameters, Setup-- > Design Parameters...

-> [Design]

Unit is Mils,Size, bit precision is other,2

Width and Height represent the width and height of the canvas respectively

LeftX and LowerY represent origin location coordinates

Click Apply to make the changes take effect

-> [Display]

Check Gridon and open SetupGrids...

Set all Spacing in Non-Etch and AllEtch to 1mil=0.0254mm

3 set the library path, Setup-- > User Preference...

Copy all the drawn components to the same directory, which is convenient to set up the library directory.

-> [Paths]

-> [Library] specify modulepathpadpath parampath psmpath to the directory where the package is located

4 draw the board and frame, Add-- > Line

Class:SubClass = Board Geometry:Outline

5 Chamfer, Manufacture-- > Dimimension/Draft-- > fillet

Chamfer radius (Radius) reference: 100mm x 100mm plate chamfer 100mil~200mil

Click on the two sides of the chamfer to complete the chamfer

6 set the allowed routing area, Setup-- > Areas-- > RouteKeepin

Class:SubClass = Route Keepin:All

In general, RouteKeepin distance from plate and frame 0.2mm (8mil) ~ 0.5mm (20mil)

Method 2: use the Z-Copy command, Edit-Z-Copy

Select Class:SubClass=RouteKeepin:All

Size chooses Contract to indent inward, and Offset fills 20mil

Click the board frame to complete the copy, this method also uses step 7

7 set the allowable element placement area, Setup-- > Areas-- > PackageKeepin

Class:SubClass = Package Keepin:All

In general, PacakgeKeepin is the same size as RouteKeepin.

Method 2: use the Z-Copy command

8 place mechanical mounting hole, Place-- > Manual

-> [Advanced Settings] check Library

-> [Placement List]

-> [Mechanical symbols] Select the mechanical mounting hole to be used, and click on the coordinates to place it.

Note: use "Select multiple components, right Align components" to align components.

9 set cascading structure, Setup-- > Cross-section

According to the default setting, the double-layer plate is in the following order: surface air, copper wiring Top layer, fiberglass dielectric layer, copper wiring Bottom layer, bottom air.

Multilayer boards need to add related layers [FIXME]

10 Import Netlist, File-- > Import-- > Logic...

-> [Cadence]

Select Designentry CIS (Capture), and Always,Importdirectory select the Netlist file path.

File- > Viewlog after import is completed. Check the import error message to make sure 0 errors,0warnings

11 place components, Place-- > QuickPlace …

Select Placeall components and click place to complete the automatic placement

Check the Unpalcedsymbol count display status and confirm that the unplaced component is 0

Note: for the KC DRC problem outside the component protruding board and frame, Waive DRCs-> Waive command, click DRC to delete.

12 constraint settings, Setup-- > Constraints-- > Constraints Manager...

-> [Physical]

-> [Physical Constraint Set]

-> [All Layers]

Lineweight is set to > = 6mil, through holes are added (non-zero values less than 6 are set to 6 or greater)

-> [Net]

-> [All Layers]

The setting of the power supply and the ground network is at least 30mil, and the high-power and high-current network is also larger.

-> [Spacing]

... Set line spacing, VIA spacing, etc., all set to at least 6milary 6mil is set according to the PCB manufacturer

13 layout and cabling

Connectors (such as DB9, JTAG interface, power interface, etc.) are placed around the PCB board.

. . .

Double-click to add a hole when routing, Act in Options can change the current PCB face, and Linewidth sets the lineweight

[Route]-- > [PCB Router]-- > [Route Automatic...] Automatic wiring

. . .

14 add screen printing

(1) add screen printing automatically

Manufacture-- > Silkscreen

-> [Layer] Both

-> [Elements] Both

-> [Classes and subclasses]

-> [Package geometry] Silk

-> [Refrence designator] Silk

... Other options None

Click Silkscreen to complete the screen printing.

(2) add screen printing information manually

-> Add-- > Text

Class:Subclass=Manufacture:AutoSilk_Top

Enter text information after setting font size and lineweight

Note: screen printing font size modification, only Text is selected in Edit- > Change,Find

Class:subclass=Manufacture: empty

Set the font size lineweight, and Done can be used after all selection.

15 add copper cladding, Shape-- > Polygon

Class:Subclass=Etch:Top

Check CreateDinamic Shape in Option and select Assign netname as Gnd network

Add underlayer copper clad, Class:Subclass=Etch:Bottom

Delete top and bottom dead copper, Shape- > Delete Islands,Delete allon layer

16 View the report, Tools-- > Quick Reports

Check at least the following 4 items:

Unconnected Pins Report

Shape Dynamic State

Shape Islands

Design Rules Check Report

17 Database check, Tools-- > Database Check

Check all 3 items, click Check check and Viewlog to view the error log

18 drilling file generation

(1) generate drilling parameter files: Manufacture- > NC-- > NC Parameters

By default, nc_param.txt is generated after clicking close.

(2) generate drilling files: Manufacture- > NC-- > NC Drill

If there are blind or buried holes, select By Layer in Drilling, otherwise default

Click Drill to generate * .drl file, and click Viewlog to view drilling file information.

(3) the generation of drilling files for irregular holes is Manufacture- > NC-- > NC Route.

By default, click Route to generate a * .rou file

(4) the generation of drilling table and drilling diagram, Manufacture- > NC-- > Drill Legend.

If there are blind or buried holes, select By Layer in Drilling, otherwise default (in mil)

Click OK to generate * .dlt file

19 generate Gerber files

(1) set the parameters of light drawing file, Manufacture- > Artwork

-> [General Parameters]

-> [Device type] Gerber RS274X

-> [OUtput units] Inches

-> [Format]

-> [Integer places] 3

-> [Decimal places] 5

-> [Film Control] set cascading structure (10 layers)

-> [Available films]

-> [Bottom]

-> ETCH/Bottom

-> PIN/Bottom

-> VIA Class/Bottom

-> [Top]

-> ETCH/Top

-> PIN/Top

-> VIA Class/Top

-> [Pastemask_Bottom]

-> PackageGeometry/Pastemask_Bottom

-> Stack-Up/Pin/Pastemask_Bottom

-> Stack-Up/Via/Pastemask_Bottom

-> [Pastemask_Top]

-> PackageGeometry/Pastemask_Top

-> Stack-Up/Pin/Pastemask_Top

-> Stack-Up/Via/Pastemask_Top

-> [Soldermask_Bottom]

-> Board Geometry/Soldermask_Bottom

-> PackageGeometry/Soldermask_Bottom

-> Stack-Up/Pin/Soldermask_Bottom

-> [Soldermask_Top]

-> BoardGeometry/Soldermask_Top

-> Package Geometry/Soldermask_Top

-> Stack-Up/Pin/Soldermask_Top

-> [Silkscreen_Bottom]

-> BoardGeometry/Silkscreen_Bottom

-> PackageGeometry/Silkscreen_Bottom

-> Manufacture/Autosilk_Bottom

-> [Silkscreen_Top]

-> BoardGeometry/Silkscreen_Top

-> PackageGeometry/Silkscreen_Top

-> Manufacture/Autosilk_Top

-> [Outline]

-> Board Geometry/Outline

-> [Drill]

-> Board Geometry/Outline

-> Manufacture/Nclegend-1-2

Select the Checkdatabase before artwork check box!

-> [Film options]

-> [Undefined line width]

Select each layer in the cascading structure and set it to 6mil

-> [Shape bounding box]

Select each layer in the cascading structure and set it to 100

-> [plot mode]

Select each layer in the cascading structure, and select Positive without special circumstances

-> [Vector based pad behavior] check each layer and check it.

Click OK to complete the parameter setting

(2) generate light drawing files, Manufacture- > Artwork

Carefully check the settings of the cascading structure, it is very important, do not make mistakes!

Select all selects all layers and confirms that Check database before artwork is selected

Execute CreateArtwork to generate the light drawing file, click Viewlog to view the generated light drawing information, and make sure there is no error!

20 package Gerber files to PCB manufacturers

There are 14 files: 10 {.art} + 1 {.drl} + 1 {.rou} + 2 {.txt}

TOP.art

Bottom.art

Pastemask_Top.art

Pastemask_Bottom.art

Soldermask_Top.art

Soldermask_Bottom.art

Silkscreen_Top.art

Silkscreen_Bottom.art

Outline.art

Drill.art

Art_param.txt

Nc_param.txt

* .rou

*-1-2.drl

Package it into .rar and send it to the manufacturer.

Thank you for reading! This is the end of this article on "how to draw PCB with Allegro". I hope the above content can be of some help to you, so that you can learn more knowledge. if you think the article is good, you can share it out for more people to see!

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