Shulou(Shulou.com)06/03 Report--

Next, let's learn more about it from the following aspects.

Introduction to make and Makefile

1.1 make tool

The compilation work can be completed automatically by using make tool. These include:

If only a few source files are modified, only those source files are recompiled

If a header file is modified, all source files that contain the header file are recompiled.

Using this kind of automatic compilation can greatly simplify the development work and avoid unnecessary recompilation.

1.2 Makefile

The make tool does and maintains compilation automatically through a file called Makefile. The Makefile file describes the compilation, linking and other rules of the whole project.

Basic rules of Makefile

TARGET...: DEPENDENCIES...

COMMAND

...

Files produced by TARGET programs, such as executable files and object files; targets can also be actions to be performed, such as clean, also known as pseudo-targets.

DEPENDENCIES is a list of input files used to generate a target, and a target usually depends on multiple files.

A command (COMMAND) is an action performed by make (a command is a shell command or a program that can be executed under shell). Note: the starting character of each command line must be a TAB character.

If there are one or more file updates in DEPENDENCIES, COMMAND will execute, which is the core content of Makefile.

Next, we will write a basic Makefile file according to the basic Makefile rules.

.PHONY: clean

Main:main.o sub.o add.o print.o

Gcc-Wall-g main.o add.o sub.o print.o-o main

Main.o:main.c

Gcc-Wall-g-c main.c-o main.o

Add.o:add.c add.h

Gcc-Wall-g-c add.c-o add.o

Sub.o:sub.c sub.h

Gcc-Wall-g-c sub.c-o sub.o

Print.o:print.c print.h

Gcc-Wall-g-c print.c-o print.o

Clean:

Rm-f * .o main

As we can see, main is the target file that we eventually want to generate, and it relies on the four .o files of main.o sub.o add.o print.o. So execute the gcc-Wall-g main.o add.o sub.o print.o-o main command to generate the object files, but these .o files are not currently available, so you have to generate them. We write four .o: .c and then execute gcc-Wall-g-c. C-o. These statements generate dependencies for the target file.

Clean is a pseudo-target file because it has no dependencies. We just want to delete the .o file through make clean, but we usually specify the statement .PHONY: clean to explicitly specify that clean is a pseudo target to prevent a clean file with the same name in the current directory. In this way, a simple Makefile file will be written.

Makefile automation variable

Although compilation can be done as above, it is obviously very troublesome, so let's take a look at the automation variables of Makefile.

Option name action

The target file name of the $@ rule

The first dependent file name of the $< rule

List of all dependent files for $^ rule

We use these automation variables to try to start from writing the Makefile

.PHONY: clean

OBJ=main.o sub.o add.o print.o

Main:$ (OBJ)

Gcc-Wall-g $^-o $@

Main.o:main.c

Gcc-Wall-g-c $<-o $@

Add.o:add.c add.h

Gcc-Wall-g-c $<-o $@

Sub.o:sub.c sub.h

Gcc-Wall-g-c $<-o $@

Print.o:print.c print.h

Gcc-Wall-g-c $<-o $@

Clean:

Rm-f * .o main

We define a variable called OBJ, which is our dependency list. Then use the automation variable instead of the corresponding file, as shown above.

However, all of us .c files have to generate .o files, which is also very troublesome to write, and we introduce some other rules.

Pattern rule

% .ovir% .c

Suffix rule

.c: .o

Let's use these two rules:

.PHONY: clean

CC = gcc

CFLAGS =-Wall-g

OBJ = main.o sub.o add.o print.o

Main:$ (OBJ)

$(CC) $(CFLAGS) $^-o $@

#%. OVA% .c

.c.o:

$(CC) $(CFLAGS)-c $<-o $@

Clean:

Rm-f * .o main

Using these two rules, all .c files are generated into .o files with the same name, which makes Makefile more concise.

Embedded functions commonly used in make

Function call

$(function arguments)

$(wildcard PATTERN)

The file that matches the pattern written in the current directory

For example: src=$ (wildcard * .c)

$(patsubst PATTERN,REPLACEMENT,TEXT)

Mode replacement function

For example: $(patsubst% .c,% .o,\ $src)

Equivalent to $(src:.c=.o)

Shell function

Execute the shell command

For example: $(shell ls-d * /)

I implemented the above steps on the linux based on the sail-imx6q development board, and interested partners can continue to study it.

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